1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_MEDIA_MSMB_ISP_H 20 #define _UAPI_MEDIA_MSMB_ISP_H 21 #include <linux/videodev2.h> 22 #define MAX_PLANES_PER_STREAM 3 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define MAX_NUM_STREAM 7 25 #define ISP_VERSION_40 40 26 #define ISP_VERSION_32 32 27 #define ISP_NATIVE_BUF_BIT 0x10000 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define ISP0_BIT 0x20000 30 #define ISP1_BIT 0x40000 31 #define ISP_STATS_STREAM_BIT 0x80000000 32 enum ISP_START_PIXEL_PATTERN { 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 ISP_BAYER_RGRGRG, 35 ISP_BAYER_GRGRGR, 36 ISP_BAYER_BGBGBG, 37 ISP_BAYER_GBGBGB, 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 ISP_YUV_YCbYCr, 40 ISP_YUV_YCrYCb, 41 ISP_YUV_CbYCrY, 42 ISP_YUV_CrYCbY, 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 ISP_PIX_PATTERN_MAX 45 }; 46 enum msm_vfe_plane_fmt { 47 Y_PLANE, 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 CB_PLANE, 50 CR_PLANE, 51 CRCB_PLANE, 52 CBCR_PLANE, 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 VFE_PLANE_FMT_MAX 55 }; 56 enum msm_vfe_input_src { 57 VFE_PIX_0, 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 VFE_RAW_0, 60 VFE_RAW_1, 61 VFE_RAW_2, 62 VFE_SRC_MAX, 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 }; 65 enum msm_vfe_axi_stream_src { 66 PIX_ENCODER, 67 PIX_VIEWFINDER, 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 CAMIF_RAW, 70 IDEAL_RAW, 71 RDI_INTF_0, 72 RDI_INTF_1, 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 RDI_INTF_2, 75 VFE_AXI_SRC_MAX 76 }; 77 enum msm_vfe_frame_skip_pattern { 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 NO_SKIP, 80 EVERY_2FRAME, 81 EVERY_3FRAME, 82 EVERY_4FRAME, 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 EVERY_5FRAME, 85 EVERY_6FRAME, 86 EVERY_7FRAME, 87 EVERY_8FRAME, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 EVERY_16FRAME, 90 EVERY_32FRAME, 91 MAX_SKIP, 92 }; 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 enum msm_vfe_camif_input { 95 CAMIF_DISABLED, 96 CAMIF_PAD_REG_INPUT, 97 CAMIF_MIDDI_INPUT, 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 CAMIF_MIPI_INPUT, 100 }; 101 struct msm_vfe_camif_cfg { 102 uint32_t lines_per_frame; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 uint32_t pixels_per_line; 105 uint32_t first_pixel; 106 uint32_t last_pixel; 107 uint32_t first_line; 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 uint32_t last_line; 110 uint32_t epoch_line0; 111 uint32_t epoch_line1; 112 enum msm_vfe_camif_input camif_input; 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 }; 115 enum msm_vfe_inputmux { 116 CAMIF, 117 TESTGEN, 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 EXTERNAL_READ, 120 }; 121 struct msm_vfe_pix_cfg { 122 struct msm_vfe_camif_cfg camif_cfg; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 enum msm_vfe_inputmux input_mux; 125 enum ISP_START_PIXEL_PATTERN pixel_pattern; 126 }; 127 struct msm_vfe_rdi_cfg { 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 uint8_t cid; 130 uint8_t frame_based; 131 }; 132 struct msm_vfe_input_cfg { 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 union { 135 struct msm_vfe_pix_cfg pix_cfg; 136 struct msm_vfe_rdi_cfg rdi_cfg; 137 } d; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 enum msm_vfe_input_src input_src; 140 uint32_t input_pix_clk; 141 }; 142 struct msm_vfe_axi_plane_cfg { 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 uint32_t output_width; 145 uint32_t output_height; 146 uint32_t output_stride; 147 uint32_t output_scan_lines; 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 uint32_t output_plane_format; 150 uint32_t plane_addr_offset; 151 uint8_t csid_src; 152 uint8_t rdi_cid; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 }; 155 struct msm_vfe_axi_stream_request_cmd { 156 uint32_t session_id; 157 uint32_t stream_id; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 uint32_t output_format; 160 enum msm_vfe_axi_stream_src stream_src; 161 struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM]; 162 uint32_t burst_count; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 uint32_t hfr_mode; 165 uint8_t frame_base; 166 uint32_t init_frame_drop; 167 enum msm_vfe_frame_skip_pattern frame_skip_pattern; 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 uint8_t buf_divert; 170 uint32_t axi_stream_handle; 171 }; 172 struct msm_vfe_axi_stream_release_cmd { 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 uint32_t stream_handle; 175 }; 176 enum msm_vfe_axi_stream_cmd { 177 STOP_STREAM, 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 START_STREAM, 180 }; 181 struct msm_vfe_axi_stream_cfg_cmd { 182 uint8_t num_streams; 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 uint32_t stream_handle[MAX_NUM_STREAM]; 185 enum msm_vfe_axi_stream_cmd cmd; 186 }; 187 enum msm_vfe_axi_stream_update_type { 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 ENABLE_STREAM_BUF_DIVERT, 190 DISABLE_STREAM_BUF_DIVERT, 191 UPDATE_STREAM_FRAMEDROP_PATTERN, 192 }; 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 struct msm_vfe_axi_stream_update_cmd { 195 uint32_t stream_handle; 196 enum msm_vfe_axi_stream_update_type update_type; 197 enum msm_vfe_frame_skip_pattern skip_pattern; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 }; 200 enum msm_isp_stats_type { 201 MSM_ISP_STATS_AEC, 202 MSM_ISP_STATS_AF, 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 MSM_ISP_STATS_AWB, 205 MSM_ISP_STATS_RS, 206 MSM_ISP_STATS_CS, 207 MSM_ISP_STATS_IHIST, 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 MSM_ISP_STATS_SKIN, 210 MSM_ISP_STATS_BG, 211 MSM_ISP_STATS_BF, 212 MSM_ISP_STATS_BE, 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 MSM_ISP_STATS_BHIST, 215 MSM_ISP_STATS_MAX 216 }; 217 struct msm_vfe_stats_stream_request_cmd { 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 uint32_t session_id; 220 uint32_t stream_id; 221 enum msm_isp_stats_type stats_type; 222 uint32_t composite_flag; 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 uint32_t framedrop_pattern; 225 uint32_t irq_subsample_pattern; 226 uint32_t buffer_offset; 227 uint32_t stream_handle; 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 }; 230 struct msm_vfe_stats_stream_release_cmd { 231 uint32_t stream_handle; 232 }; 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 struct msm_vfe_stats_stream_cfg_cmd { 235 uint8_t num_streams; 236 uint32_t stream_handle[MSM_ISP_STATS_MAX]; 237 uint8_t enable; 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 }; 240 enum msm_vfe_reg_cfg_type { 241 VFE_WRITE, 242 VFE_WRITE_MB, 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 VFE_READ, 245 VFE_CFG_MASK, 246 VFE_WRITE_DMI_16BIT, 247 VFE_WRITE_DMI_32BIT, 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 VFE_WRITE_DMI_64BIT, 250 VFE_READ_DMI_16BIT, 251 VFE_READ_DMI_32BIT, 252 VFE_READ_DMI_64BIT, 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 }; 255 struct msm_vfe_cfg_cmd2 { 256 uint16_t num_cfg; 257 uint16_t cmd_len; 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 void __user *cfg_data; 260 void __user *cfg_cmd; 261 }; 262 struct msm_vfe_reg_rw_info { 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 uint32_t reg_offset; 265 uint32_t cmd_data_offset; 266 uint32_t len; 267 }; 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 struct msm_vfe_reg_mask_info { 270 uint32_t reg_offset; 271 uint32_t mask; 272 uint32_t val; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 }; 275 struct msm_vfe_reg_dmi_info { 276 uint32_t hi_tbl_offset; 277 uint32_t lo_tbl_offset; 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 uint32_t len; 280 }; 281 struct msm_vfe_reg_cfg_cmd { 282 union { 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 struct msm_vfe_reg_rw_info rw_info; 285 struct msm_vfe_reg_mask_info mask_info; 286 struct msm_vfe_reg_dmi_info dmi_info; 287 } u; 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 enum msm_vfe_reg_cfg_type cmd_type; 290 }; 291 enum msm_isp_buf_type { 292 ISP_PRIVATE_BUF, 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 ISP_SHARE_BUF, 295 MAX_ISP_BUF_TYPE, 296 }; 297 struct msm_isp_buf_request { 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 uint32_t session_id; 300 uint32_t stream_id; 301 uint8_t num_buf; 302 uint32_t handle; 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 enum msm_isp_buf_type buf_type; 305 }; 306 struct msm_isp_qbuf_info { 307 uint32_t handle; 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 int buf_idx; 310 struct v4l2_buffer buffer; 311 uint32_t dirty_buf; 312 }; 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 struct msm_vfe_axi_src_state { 315 enum msm_vfe_input_src input_src; 316 uint32_t src_active; 317 }; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 enum msm_isp_event_idx { 320 ISP_REG_UPDATE = 0, 321 ISP_START_ACK = 1, 322 ISP_STOP_ACK = 2, 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 ISP_IRQ_VIOLATION = 3, 325 ISP_WM_BUS_OVERFLOW = 4, 326 ISP_STATS_OVERFLOW = 5, 327 ISP_CAMIF_ERROR = 6, 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 ISP_SOF = 7, 330 ISP_EOF = 8, 331 ISP_EVENT_MAX = 9 332 }; 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 #define ISP_EVENT_OFFSET 8 335 #define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START) 336 #define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET)) 337 #define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET)) 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 #define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE) 340 #define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK) 341 #define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK) 342 #define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION) 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 #define ISP_EVENT_WM_BUS_OVERFLOW (ISP_EVENT_BASE + ISP_WM_BUS_OVERFLOW) 345 #define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW) 346 #define ISP_EVENT_CAMIF_ERROR (ISP_EVENT_BASE + ISP_CAMIF_ERROR) 347 #define ISP_EVENT_SOF (ISP_EVENT_BASE + ISP_SOF) 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 #define ISP_EVENT_EOF (ISP_EVENT_BASE + ISP_EOF) 350 #define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE) 351 #define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE) 352 #define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX) 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 struct msm_isp_buf_event { 355 uint32_t session_id; 356 uint32_t stream_id; 357 uint32_t handle; 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 int8_t buf_idx; 360 }; 361 struct msm_isp_stats_event { 362 uint32_t stats_mask; 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX]; 365 }; 366 struct msm_isp_stream_ack { 367 uint32_t session_id; 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 uint32_t stream_id; 370 uint32_t handle; 371 }; 372 struct msm_isp_event_data { 373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 374 struct timeval timestamp; 375 struct timeval mono_timestamp; 376 uint32_t frame_id; 377 union { 378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 379 struct msm_isp_stream_ack stream_ack; 380 enum msm_vfe_input_src input_src; 381 struct msm_isp_stats_event stats; 382 uint32_t irq_status_mask; 383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 384 struct msm_isp_buf_event buf_done; 385 } u; 386 }; 387 #define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8') 388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 389 #define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8') 390 #define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8') 391 #define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8') 392 #define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0') 393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 394 #define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0') 395 #define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0') 396 #define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0') 397 #define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2') 398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 399 #define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2') 400 #define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2') 401 #define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2') 402 #define VIDIOC_MSM_VFE_REG_CFG _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2) 403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 404 #define VIDIOC_MSM_ISP_REQUEST_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+1, struct msm_isp_buf_request) 405 #define VIDIOC_MSM_ISP_ENQUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+2, struct msm_isp_qbuf_info) 406 #define VIDIOC_MSM_ISP_RELEASE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE+3, struct msm_isp_buf_request) 407 #define VIDIOC_MSM_ISP_REQUEST_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+4, struct msm_vfe_axi_stream_request_cmd) 408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 409 #define VIDIOC_MSM_ISP_CFG_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+5, struct msm_vfe_axi_stream_cfg_cmd) 410 #define VIDIOC_MSM_ISP_RELEASE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+6, struct msm_vfe_axi_stream_release_cmd) 411 #define VIDIOC_MSM_ISP_INPUT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE+7, struct msm_vfe_input_cfg) 412 #define VIDIOC_MSM_ISP_SET_SRC_STATE _IOWR('V', BASE_VIDIOC_PRIVATE+8, struct msm_vfe_axi_src_state) 413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 414 #define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+9, struct msm_vfe_stats_stream_request_cmd) 415 #define VIDIOC_MSM_ISP_CFG_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+10, struct msm_vfe_stats_stream_cfg_cmd) 416 #define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+11, struct msm_vfe_stats_stream_release_cmd) 417 #define VIDIOC_MSM_ISP_CFG_STATS_COMP_POLICY _IOWR('V', BASE_VIDIOC_PRIVATE+12, struct msm_vfe_stats_comp_policy_cfg) 418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 419 #define VIDIOC_MSM_ISP_UPDATE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE+13, struct msm_vfe_axi_stream_update_cmd) 420 #endif 421
