/prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
io_32.h | 26 #define BUILDIO(bwl,bw,type) static inline void out##bwl##_local(unsigned type value, int port) { __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); } static inline unsigned type in##bwl##_local(int port) { unsigned type value; __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); return value; } static inline void out##bwl##_local_p(unsigned type value, int port) { out##bwl##_local(value, port); slow_down_io(); } static inline unsigned type in##bwl##_local_p(int port) { unsigned type value = in##bwl##_local(port); slow_down_io(); return value; } __BUILDIO(bwl,bw,type) static inline void out##bwl##_p(unsigned type value, int port) { out##bwl(value, port); slow_down_io(); } static inline unsigned type in##bwl##_p(int port) { unsigned type value = in##bwl(port); slow_down_io(); return value; } static inline void outs##bwl(int port, const void *addr, unsigned long count) { __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); } static inline void ins##bwl(int port, void *addr, unsigned long count) { __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); }
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/prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
io_32.h | 26 #define BUILDIO(bwl,bw,type) static inline void out##bwl##_local(unsigned type value, int port) { __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); } static inline unsigned type in##bwl##_local(int port) { unsigned type value; __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); return value; } static inline void out##bwl##_local_p(unsigned type value, int port) { out##bwl##_local(value, port); slow_down_io(); } static inline unsigned type in##bwl##_local_p(int port) { unsigned type value = in##bwl##_local(port); slow_down_io(); return value; } __BUILDIO(bwl,bw,type) static inline void out##bwl##_p(unsigned type value, int port) { out##bwl(value, port); slow_down_io(); } static inline unsigned type in##bwl##_p(int port) { unsigned type value = in##bwl(port); slow_down_io(); return value; } static inline void outs##bwl(int port, const void *addr, unsigned long count) { __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); } static inline void ins##bwl(int port, void *addr, unsigned long count) { __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); }
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/external/javassist/src/main/javassist/tools/rmi/ |
AppletServer.java | 144 private void processRMI(InputStream ins, OutputStream outs) 165 outs.write(okHeader); 166 ObjectOutputStream out = new ObjectOutputStream(outs); 221 private void lookupName(String cmd, InputStream ins, OutputStream outs) 227 outs.write(okHeader); 228 ObjectOutputStream out = new ObjectOutputStream(outs);
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/external/llvm/lib/Target/NVPTX/ |
NVPTXVector.td | 18 class NVPTXVecInst<dag outs, dag ins, string asmstr, list<dag> pattern, 20 : NVPTXInst<outs, ins, asmstr, pattern> { 26 def V2i16Extract : NVPTXVecInst<(outs Int16Regs:$dst), 34 def V4i16Extract : NVPTXVecInst<(outs Int16Regs:$dst), 42 def V2i8Extract : NVPTXVecInst<(outs Int8Regs:$dst), 50 def V4i8Extract : NVPTXVecInst<(outs Int8Regs:$dst), 58 def V2i32Extract : NVPTXVecInst<(outs Int32Regs:$dst), 66 def V2f32Extract : NVPTXVecInst<(outs Float32Regs:$dst), 74 def V2i64Extract : NVPTXVecInst<(outs Int64Regs:$dst), 82 def V2f64Extract : NVPTXVecInst<(outs Float64Regs:$dst) [all...] |
NVPTXIntrinsics.td | 35 def INT_CUDA_SYNCTHREADS : NVPTXInst<(outs), (ins), 38 def INT_BARRIER0 : NVPTXInst<(outs), (ins), 41 def INT_BARRIER0_POPC : NVPTXInst<(outs Int32Regs:$dst), (ins Int32Regs:$pred), 48 def INT_BARRIER0_AND : NVPTXInst<(outs Int32Regs:$dst), (ins Int32Regs:$pred), 57 def INT_BARRIER0_OR : NVPTXInst<(outs Int32Regs:$dst), (ins Int32Regs:$pred), 72 NVPTXInst<(outs), (ins), 121 : NVPTXInst<(outs target_regclass:$dst), (ins src_regclass:$src0), 129 : NVPTXInst<(outs t_regclass:$dst), 137 : NVPTXInst<(outs t_regclass:$dst), [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonInstrInfo.td | 21 def rr : ALU32_rr<(outs IntRegs:$dst), (ins IntRegs:$b, IntRegs:$c), 25 def ri : ALU32_ri<(outs IntRegs:$dst), (ins s10Imm:$b, IntRegs:$c), 34 def rr : ALU64_rr<(outs PredRegs:$dst), (ins DoubleRegs:$b, DoubleRegs:$c), 43 def rr : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$b, IntRegs:$c), 50 def ri : ALU32_ri<(outs PredRegs:$dst), (ins IntRegs:$b, s10Ext:$c), 60 def rr : ALU32_rr<(outs PredRegs:$dst), (ins IntRegs:$b, IntRegs:$c), 67 def ri : ALU32_ri<(outs PredRegs:$dst), (ins IntRegs:$b, u9Ext:$c), 76 def ri : ALU32_ri<(outs PredRegs:$dst), (ins IntRegs:$b, s8Ext:$c), 98 def NAME : ALU32_rr<(outs RC:$dst), 117 def NAME : ALU32_rr<(outs IntRegs:$dst) [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrFMA.td | 24 def r : FMA3<opc, MRMSrcReg, (outs VR128:$dst), 32 def m : FMA3<opc, MRMSrcMem, (outs VR128:$dst), 40 def rY : FMA3<opc, MRMSrcReg, (outs VR256:$dst), 48 def mY : FMA3<opc, MRMSrcMem, (outs VR256:$dst), 122 def r : FMA3<opc, MRMSrcReg, (outs RC:$dst), 129 def m : FMA3<opc, MRMSrcMem, (outs RC:$dst), 142 def r_Int : FMA3<opc, MRMSrcReg, (outs VR128:$dst), 148 def m_Int : FMA3<opc, MRMSrcMem, (outs VR128:$dst), 204 def rr : FMA4<opc, MRMSrcReg, (outs RC:$dst), 210 def rm : FMA4<opc, MRMSrcMem, (outs RC:$dst) [all...] |
X86InstrAVX512.td | 88 def VINSERTF32x4rr : AVX512AIi8<0x18, MRMSrcReg, (outs VR512:$dst), 93 def VINSERTF32x4rm : AVX512AIi8<0x18, MRMSrcMem, (outs VR512:$dst), 101 def VINSERTF64x4rr : AVX512AIi8<0x1a, MRMSrcReg, (outs VR512:$dst), 106 def VINSERTF64x4rm : AVX512AIi8<0x1a, MRMSrcMem, (outs VR512:$dst), 113 def VINSERTI32x4rr : AVX512AIi8<0x38, MRMSrcReg, (outs VR512:$dst), 118 def VINSERTI32x4rm : AVX512AIi8<0x38, MRMSrcMem, (outs VR512:$dst), 127 def VINSERTI64x4rr : AVX512AIi8<0x3a, MRMSrcReg, (outs VR512:$dst), 132 def VINSERTI64x4rm : AVX512AIi8<0x3a, MRMSrcMem, (outs VR512:$dst), 193 def VINSERTPSzrr : AVX512AIi8<0x21, MRMSrcReg, (outs VR128X:$dst), 198 def VINSERTPSzrm: AVX512AIi8<0x21, MRMSrcMem, (outs VR128X:$dst) [all...] |
/external/llvm/tools/bugpoint/ |
CrashDebugger.cpp | 68 outs() << "Checking to see if these passes crash: " 84 outs() << "Checking to see if these passes crash: " 143 outs() << "Checking for crash with only these global variables: "; 145 outs() << ": "; 218 outs() << "Checking for crash with only these functions: "; 220 outs() << ": "; 280 outs() << "Checking for crash with only these blocks:"; 284 outs() << " " << BBs[i]->getName(); 286 outs() << "... <" << Blocks.size() << " total>"; 287 outs() << ": " [all...] |
/dalvik/dx/tests/121-sccp/ |
expected.txt | 2 regs: 0008; ins: 0000; outs: 0000 30 regs: 0008; ins: 0000; outs: 0000 59 regs: 0006; ins: 0000; outs: 0000 78 regs: 0006; ins: 0000; outs: 0000 104 regs: 0007; ins: 0000; outs: 0000 125 regs: 0004; ins: 0000; outs: 0000 153 regs: 0004; ins: 0000; outs: 0000 182 regs: 0003; ins: 0000; outs: 0000 201 regs: 0003; ins: 0000; outs: 0000 227 regs: 0004; ins: 0000; outs: 000 [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.td | 40 // (outs Result), (ins NZCV, IfTrue, IfFalse, Condition) 46 // (outs NZCV), (ins LHS, RHS, Condition) 52 // (outs GPR64), (ins) 170 def ADJCALLSTACKDOWN : PseudoInst<(outs), (ins i64imm:$amt), 173 def ADJCALLSTACKUP : PseudoInst<(outs), (ins i64imm:$amt1, i64imm:$amt2), 188 def _I8 : PseudoInst<(outs GPR32:$dst), 190 def _I16 : PseudoInst<(outs GPR32:$dst), 192 def _I32 : PseudoInst<(outs GPR32:$dst), 194 def _I64 : PseudoInst<(outs GPR64:$dst), 215 : PseudoInst<(outs GPRData:$dst) [all...] |
/frameworks/compile/mclinker/lib/Support/ |
CommandLine.cpp | 45 outs() << "= " << pValue; 47 outs().indent(NumSpaces) << " (default: "; 49 outs() << pDefault.getValue(); 51 outs() << "*no default*"; 52 outs() << ")\n"; 78 outs() << "= " << V; 81 outs().indent(NumSpaces) << " (default: "; 83 outs() << Default.getValue().c_str(); 85 outs() << "*no default*"; 86 outs() << ")\n" [all...] |
/external/llvm/lib/Target/ARM/ |
ARMInstrThumb2.td | 569 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), iii, 579 def rr : T2sThreeReg<(outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), iir, 593 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm), iis, 653 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_imm:$imm), IIC_iALUi, 664 (outs rGPR:$Rd), (ins rGPR:$Rn, rGPR:$Rm), IIC_iALUr, 677 (outs rGPR:$Rd), (ins rGPR:$Rn, t2_so_reg:$ShiftedRm), 697 def ri : t2PseudoInst<(outs rGPR:$Rd), 704 def rr : t2PseudoInst<(outs rGPR:$Rd), (ins GPRnopc:$Rn, rGPR:$Rm, pred:$p), 712 def rs : t2PseudoInst<(outs rGPR:$Rd), 726 def ri : t2PseudoInst<(outs rGPR:$Rd) [all...] |
/external/llvm/lib/IR/ |
GCOV.cpp | 157 outs() << "===== " << Name << " @ " << Filename << ":" << LineNumber << "\n"; 197 outs() << "Block : " << Number << " Counter : " << Counter << "\n"; 199 outs() << "\tEdges : "; 202 outs() << (*I) << ","; 203 outs() << "\n"; 206 outs() << "\tLines : "; 209 outs() << LI->first() << " -> "; 211 outs() << "\n"; 232 outs() << (*I) << ","; 261 outs() << Filename << "\n" [all...] |
/external/llvm/tools/llvm-nm/ |
llvm-nm.cpp | 201 outs() << '\n' << CurrentFilename << ":\n"; 203 outs() << "\n" << CurrentFilename << ":\n"; 205 outs() << "\n\nSymbols from " << CurrentFilename << ":\n\n" 234 outs() << i->Name << " " << i->TypeChar << " " 238 outs() << SymbolAddrStr << ' '; 240 outs() << SymbolSizeStr; 242 outs() << ' '; 244 outs() << i->TypeChar << " " << i->Name << "\n"; 249 outs() << PaddedName << "|" << SymbolAddrStr << "| " 371 outs() << "Archive map" << "\n" [all...] |
/external/llvm/tools/llvm-readobj/ |
llvm-readobj.cpp | 139 outs() << "\nError reading file: " << EC.message() << ".\n"; 140 outs().flush(); 189 StreamWriter Writer(outs()); 196 outs() << '\n'; 197 outs() << "File: " << Obj->getFileName() << "\n"; 198 outs() << "Format: " << Obj->getFileFormatName() << "\n"; 199 outs() << "Arch: " 202 outs() << "AddressSize: " << (8*Obj->getBytesInAddress()) << "bit\n"; 204 outs() << "LoadName: " << Obj->getLoadName() << "\n";
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/frameworks/compile/mclinker/lib/Core/ |
Linker.cpp | 106 mcld::outs() << "** name\ttype\tpath\tsize (" << pModule.getInputTree().size() << ")\n"; 109 mcld::outs() << counter++ << " * " << (*input)->name(); 112 mcld::outs() << "\tarchive\t("; 115 mcld::outs() << "\tobject\t("; 118 mcld::outs() << "\tshared\t("; 121 mcld::outs() << "\tscript\t("; 124 mcld::outs() << "\textern\t("; 131 mcld::outs() << (*input)->path() << ")\n"; 334 mcld::outs().setColor(m_pConfig->options().color());
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/dalvik/dx/tests/066-dex-try-catch-rethrow/ |
expected.txt | 2 regs: 0005; ins: 0000; outs: 0002 21 regs: 0005; ins: 0000; outs: 0002 39 regs: 0005; ins: 0000; outs: 0002 58 regs: 0005; ins: 0000; outs: 0002 77 regs: 0005; ins: 0000; outs: 0002
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/external/chromium_org/ppapi/native_client/src/trusted/plugin/ |
srpc_client.cc | 27 const char* outs, 35 outs_(STRDUP(outs)), 47 char* outs() const { return outs_; } function in class:plugin::MethodInfo 156 return params->Init(method_info->ins(), method_info->outs()); 182 params->outs());
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/dalvik/dx/tests/109-int-branch/ |
expected.txt | 3 regs: 000f; ins: 0006; outs: 0000 33 regs: 0005; ins: 0001; outs: 0000 48 regs: 0007; ins: 0002; outs: 0000
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/external/chromium_org/tools/clang/rewrite_scoped_array/ |
RewriteScopedArray.cpp | 87 llvm::outs() << "==== BEGIN EDITS ====\n"; 90 llvm::outs() << "r:" << it->getFilePath() << ":" << it->getOffset() << ":" 93 llvm::outs() << "==== END EDITS ====\n";
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/external/llvm/lib/Target/Mips/ |
Mips16InstrInfo.td | 41 FI816<_func, (outs), (ins simm16:$imm), !strconcat(asmstr, asmstr2), 56 FRI16<op, (outs CPU16Regs:$rx), (ins simm16:$imm), 65 FRI16<op, (outs), (ins CPU16Regs:$rx, simm16:$imm), 74 FRI16<_op, (outs CPU16Regs:$rx), (ins CPU16Regs:$rx_, simm16:$imm), 81 FRI16<_op, (outs), (ins CPU16Regs:$rx, brtarget:$imm), 90 MipsPseudo16<(outs CPU16Regs:$cc), (ins CPU16Regs:$rx, simm16:$imm), 100 FJAL16<_X, (outs), (ins simm20:$imm), 109 FEXT_I16<eop, (outs), (ins brtarget:$imm16), 118 FEXT_I816<_func, (outs), (ins simm16:$imm), !strconcat(asmstr, asmstr2), 139 MipsPseudo16<(outs CPU16Regs:$cc), (ins CPU16Regs:$rx, CPU16Regs:$ry) [all...] |
/external/llvm/test/TableGen/ |
MultiPat.td | 34 def outs; 106 def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), 109 def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
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/frameworks/compile/mclinker/include/mcld/Support/ |
raw_ostream.h | 61 /// outs() - This returns a reference to a raw_ostream for standard output. 62 /// Use it like: outs() << "foo" << "bar"; 63 mcld::raw_fd_ostream &outs();
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/external/llvm/lib/Target/R600/ |
R600Instructions.td | 17 class InstR600ISA <dag outs, dag ins, string asm, list<dag> pattern> : 18 InstR600 <outs, ins, asm, pattern, NullALU> { 95 InstR600 <(outs R600_Reg32:$dst), 136 InstR600 <(outs R600_Reg32:$dst), 176 InstR600 <(outs R600_Reg32:$dst), 206 InstR600 <(outs R600_Reg32:$dst), 244 class EG_CF_RAT <bits <8> cfinst, bits <6> ratinst, bits<4> mask, dag outs, 246 InstR600ISA <outs, ins, asm, pattern>, 270 class VTX_READ <string name, bits<8> buffer_id, dag outs, list<dag> pattern> 271 : InstR600ISA <outs, (ins MEMxi:$src_gpr), name, pattern> [all...] |