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  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/lib/gcc/i686-linux/4.4.3/include/
ammintrin.h 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
  /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/lib/gcc/i686-linux/4.6.x-google/include/
ammintrin.h 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/lib/gcc/x86_64-linux/4.6.x-google/include/
ammintrin.h 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
  /prebuilts/gcc/linux-x86/x86/i686-linux-android-4.6/lib/gcc/i686-linux-android/4.6/include/
ammintrin.h 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
  /prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/lib/gcc/i686-linux-android/4.7/include/
ammintrin.h 34 /* We need definitions from the SSE3, SSE2 and SSE header files*/
  /external/pixman/pixman/
Makefile.in 68 # sse2 code
69 @USE_SSE2_TRUE@am__append_6 = libpixman-sse2.la
71 @USE_SSE2_TRUE@am__append_8 = libpixman-sse2.la
210 am__libpixman_sse2_la_SOURCES_DIST = pixman-sse2.c
212 @USE_SSE2_TRUE@ libpixman_sse2_la-pixman-sse2.lo
507 @USE_SSE2_TRUE@ pixman-sse2.c
638 libpixman-sse2.la: $(libpixman_sse2_la_OBJECTS) $(libpixman_sse2_la_DEPENDENCIES) $(EXTRA_libpixman_sse2_la_DEPENDENCIES)
651 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/libpixman_sse2_la-pixman-sse2.Plo@am__quote@
    [all...]
  /external/chromium_org/gpu/config/
gpu_info_collector_unittest.cc 37 const char* gl_renderer = "Quadro FX 380/PCI/SSE2";
65 const char* gl_renderer = "Quadro FX 380/PCI/SSE2";
  /external/chromium_org/third_party/protobuf/src/google/protobuf/stubs/
atomicops_internals_x86_gcc.cc 72 false, // no SSE2
115 // edx bit 26 is SSE2 which we use to tell use whether we can use mfence
  /external/chromium_org/third_party/tcmalloc/chromium/src/base/
atomicops-internals-x86.cc 70 false, // no SSE2
112 // edx bit 26 is SSE2 which we use to tell use whether we can use mfence
  /external/chromium_org/third_party/tcmalloc/vendor/src/base/
atomicops-internals-x86.cc 70 false, // no SSE2
112 // edx bit 26 is SSE2 which we use to tell use whether we can use mfence
  /external/chromium_org/v8/src/
atomicops_internals_x86_gcc.cc 69 false, // no SSE2
116 // edx bit 26 is SSE2 which we use to tell use whether we can use mfence
  /external/libvorbis/lib/
os.h 146 /* Optimized code path for x86_64 builds. Uses SSE2 intrinsics. This can be
147 done safely because all x86_64 CPUs supports SSE2. */
  /external/libvpx/libvpx/vp8/encoder/x86/
ssim_opt.asm 59 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
  /external/libvpx/libvpx/vp9/encoder/x86/
vp9_ssim_opt.asm 59 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
149 ; ( calling app will initialize to 0 ) could easily fit everything in sse2
  /external/llvm/test/CodeGen/X86/
lsr-reuse-trunc.ll 43 %16 = tail call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %15) nounwind readnone
62 declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
vshift-4.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
3 ; test vector shifts converted to proper SSE2 vector shifts when the shift
fold-pcmpeqd-0.ll 47 %tmp69 = call <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float> zeroinitializer) nounwind ; <<4 x i32>> [#uses=1]
48 %tmp70 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %tmp69) nounwind ; <<4 x float>> [#uses=1]
64 %tmp80 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> zeroinitializer) nounwind ; <<4 x float>> [#uses=1]
111 declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
113 declare <4 x i32> @llvm.x86.sse2.cvttps2dq(<4 x float>) nounwind readnone
  /external/v8/src/
atomicops_internals_x86_gcc.cc 68 false, // no SSE2
115 // edx bit 26 is SSE2 which we use to tell use whether we can use mfence
  /external/llvm/lib/Target/X86/
X86InstrFormats.td 422 // SSE2 Instruction Templates:
424 // SDI - SSE2 instructions with XD prefix.
425 // SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
426 // S2SI - SSE2 instructions with XS prefix.
427 // SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix.
428 // PDI - SSE2 instructions with TB and OpSize prefixes, packed double domain.
429 // PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
430 // VSDI - SSE2 scalar instructions with XD prefix in AVX form.
431 // VPDI - SSE2 vector instructions with TB and OpSize prefixes in AVX form,
433 // VS2I - SSE2 scalar instructions with TB and OpSize prefixes in AVX form
    [all...]
  /external/chromium_org/v8/test/cctest/
test-disasm-ia32.cc 362 if (CpuFeatures::IsSupported(SSE2)) {
363 CpuFeatureScope fscope(&assm, SSE2);
407 if (CpuFeatures::IsSupported(SSE2)) {
408 CpuFeatureScope fscope(&assm, SSE2);
436 if (CpuFeatures::IsSupported(SSE2) &&
  /external/eigen/
CMakeLists.txt 129 option(EIGEN_TEST_SSE2 "Enable/Disable SSE2 in tests/examples" OFF)
132 message(STATUS "Enabling SSE2 in tests/examples")
204 option(EIGEN_TEST_SSE2 "Enable/Disable SSE2 in tests/examples" OFF)
208 set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /arch:SSE2")
210 message(STATUS "Enabling SSE2 in tests/examples")
  /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
bn-586.pl 9 $sse2=0;
10 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
12 &external_label("OPENSSL_ia32cap_P") if ($sse2);
28 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
34 if ($sse2) {
214 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
220 if ($sse2) {
325 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
331 if ($sse2) {
  /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
sha512-586.pl 18 # SSE2 asm - - 38 24 20
27 # to 50%, but it's less important as they are expected to execute SSE2
29 # code]. SSE2 code-path is as fast as original sha512-sse2.pl, even
31 # SSE2-aware kernel is no longer required to execute the code. Another
41 $sse2=0;
42 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
44 &external_label("OPENSSL_ia32cap_P") if ($sse2);
285 if ($sse2) {
  /external/openssl/crypto/bn/asm/
bn-586.pl 9 $sse2=0;
10 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
12 &external_label("OPENSSL_ia32cap_P") if ($sse2);
28 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
34 if ($sse2) {
214 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
220 if ($sse2) {
325 &function_begin_B($name,$sse2?"EXTRN\t_OPENSSL_ia32cap_P:DWORD":"");
331 if ($sse2) {
  /external/openssl/crypto/sha/asm/
sha512-586.pl 18 # SSE2 asm - - 38 24 20
27 # to 50%, but it's less important as they are expected to execute SSE2
29 # code]. SSE2 code-path is as fast as original sha512-sse2.pl, even
31 # SSE2-aware kernel is no longer required to execute the code. Another
41 $sse2=0;
42 for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); }
44 &external_label("OPENSSL_ia32cap_P") if ($sse2);
285 if ($sse2) {

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