/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsMCCodeEmitter.cpp | 132 switch (Inst.getOpcode()) { 150 int Opcode = InstIn.getOpcode(); 191 switch (MI.getOpcode()) { 209 unsigned Opcode = TmpInst.getOpcode(); 222 const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
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/external/llvm/lib/Transforms/InstCombine/ |
InstCombineVectorOps.cpp | 39 if (I->getOpcode() == Instruction::InsertElement && isConstant && 42 if (I->getOpcode() == Instruction::Load && I->hasOneUse()) 152 BinaryOperator::Create(B0->getOpcode(), scalarPHI, Op), *B0); 241 return BinaryOperator::Create(BO->getOpcode(), newEI0, newEI1); 279 if (CI->hasOneUse() && (CI->getOpcode() != Instruction::BitCast)) { 283 return CastInst::Create(CI->getOpcode(), EE, EI.getType()); 515 switch (I->getOpcode()) { 578 switch (I->getOpcode()) { 600 BinaryOperator::Create(cast<BinaryOperator>(I)->getOpcode(), 634 return CastInst::Create(cast<CastInst>(I)->getOpcode(), NewOps[0], DestTy [all...] |
InstCombineCasts.cpp | 44 if (I->getOpcode() == Instruction::Shl) { 51 if (I->getOpcode() == Instruction::Mul) { 58 if (I->getOpcode() == Instruction::Add) { 173 unsigned Opc = I->getOpcode(); 245 Instruction::CastOps firstOp = Instruction::CastOps(CI->getOpcode()); 298 isEliminableCastPair(CSrc, CI.getOpcode(), CI.getType(), TD)) { 355 unsigned Opc = I->getOpcode(); 668 unsigned Opc = I->getOpcode(), Tmp; [all...] |
InstCombinePHI.cpp | 27 unsigned Opc = FirstInst->getOpcode(); 46 if (!I || I->getOpcode() != Opc || !I->hasOneUse() || 114 CmpInst *NewCI = CmpInst::Create(CIOp->getOpcode(), CIOp->getPredicate(), 122 BinaryOperator::Create(BinOp->getOpcode(), LHSVal, RHSVal); 484 CastInst *NewCI = CastInst::Create(FirstCI->getOpcode(), PhiVal, 491 BinOp = BinaryOperator::Create(BinOp->getOpcode(), PhiVal, ConstantOp); 500 CmpInst *NewCI = CmpInst::Create(CIOp->getOpcode(), CIOp->getPredicate(), 673 if (User->getOpcode() != Instruction::LShr || 802 cast<Instruction>(PN.getIncomingValue(0))->getOpcode() == 803 cast<Instruction>(PN.getIncomingValue(1))->getOpcode() & [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 34 switch (getOpcode()) { 36 if (getOpcode() < ISD::BUILTIN_OP_END) 43 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 47 const char *Name = TLI.getTargetNodeName(getOpcode()); 49 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 51 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 105 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
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LegalizeVectorTypes.cpp | 39 switch (N->getOpcode()) { 131 return DAG.getNode(N->getOpcode(), SDLoc(N), 139 return DAG.getNode(N->getOpcode(), SDLoc(N), 230 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op); 237 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT, 320 if (Arg.getOpcode() == ISD::UNDEF) 358 switch (N->getOpcode()) { 416 Ops[0] = DAG.getNode(N->getOpcode(), SDLoc(N), 486 switch (N->getOpcode()) { 593 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo) [all...] |
SelectionDAGISel.cpp | 471 const MCInstrDesc &MCID = TM.getInstrInfo()->get(II->getOpcode()); 556 if (N->getOpcode() != ISD::CopyToReg) 796 if (ResNode == Node || Node->getOpcode() == ISD::DELETED_NODE) [all...] |
LegalizeDAG.cpp | [all...] |
ScheduleDAGSDNodes.h | 68 if (Node->getOpcode() == ISD::EntryToken ||
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/external/llvm/lib/IR/ |
Instruction.cpp | 272 if (getOpcode() != I->getOpcode() || 338 if (getOpcode() != I->getOpcode() || 421 switch (getOpcode()) { 441 switch (getOpcode()) { 482 unsigned Opcode = getOpcode();
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/external/llvm/lib/Target/ARM/ |
ARMConstantIslandPass.cpp | 602 assert(CPEMI && CPEMI->getOpcode() == ARM::CONSTPOOL_ENTRY); 625 if (I->isBranch() && I->getOpcode() == ARM::t2BR_JT) 667 int Opc = I->getOpcode(); 817 if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) { [all...] |
ARMISelLowering.cpp | [all...] |
ARMBaseRegisterInfo.h | 91 unsigned getOpcode(int Op) const;
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ARMMCInstLower.cpp | 116 OutMI.setOpcode(MI->getOpcode());
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/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
PPCCTRLoops.cpp | 350 (J->getOpcode() == Instruction::UDiv || 351 J->getOpcode() == Instruction::SDiv || 352 J->getOpcode() == Instruction::URem || 353 J->getOpcode() == Instruction::SRem)) { 564 unsigned Opc = I->getOpcode(); 626 unsigned Opc = MII->getOpcode();
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/external/llvm/lib/Analysis/ |
ConstantFolding.cpp | 236 if (CE->getOpcode() == Instruction::PtrToInt || 237 CE->getOpcode() == Instruction::BitCast) 369 if (CE->getOpcode() == Instruction::IntToPtr && 469 if (CE->getOpcode() == Instruction::GetElementPtr) { 672 if (CE && CE->getOpcode() == Instruction::Sub && 717 if (CE->getOpcode() == Instruction::IntToPtr) [all...] |
CaptureTracking.cpp | 106 switch (I->getOpcode()) {
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/external/llvm/lib/Target/SystemZ/ |
SystemZFrameLowering.cpp | 330 if (MBBI != MBB.end() && MBBI->getOpcode() == SystemZ::STMG) 393 (MBBI->getOpcode() == SystemZ::STD || 394 MBBI->getOpcode() == SystemZ::STDY)) 423 assert(MBBI->getOpcode() == SystemZ::RET && 429 unsigned Opcode = MBBI->getOpcode(); 511 switch (MI->getOpcode()) {
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/dalvik/dexgen/src/com/android/dexgen/dex/code/ |
InsnFormat.java | 46 String op = insn.getOpcode().getName(); 409 int opcode = insn.getOpcode().getOpcode();
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/dalvik/dx/src/com/android/dx/ssa/ |
ConstCollector.java | 174 if (insn == null || insn.getOpcode() == null) continue; 184 if (insn.getOpcode().getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
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SsaInsn.java | 178 abstract public Rop getOpcode();
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/external/dexmaker/src/dx/java/com/android/dx/ssa/ |
ConstCollector.java | 174 if (insn == null || insn.getOpcode() == null) continue; 184 if (insn.getOpcode().getOpcode() == RegOps.MOVE_RESULT_PSEUDO) {
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/external/llvm/lib/Target/AArch64/ |
AArch64BranchFixupPass.cpp | 283 int Opc = I->getOpcode(); 490 if (MI->getOpcode() == AArch64::Bcc) { 500 switch (MI->getOpcode()) { 532 BMI->getOpcode() == AArch64::Bimm) {
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