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      1 //===-- R600MachineScheduler.h - R600 Scheduler Interface -*- C++ -*-------===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 /// \file
     11 /// \brief R600 Machine Scheduler interface
     12 //
     13 //===----------------------------------------------------------------------===//
     14 
     15 #ifndef R600MACHINESCHEDULER_H_
     16 #define R600MACHINESCHEDULER_H_
     17 
     18 #include "R600InstrInfo.h"
     19 #include "llvm/ADT/PriorityQueue.h"
     20 #include "llvm/CodeGen/MachineScheduler.h"
     21 #include "llvm/Support/Debug.h"
     22 
     23 using namespace llvm;
     24 
     25 namespace llvm {
     26 
     27 class R600SchedStrategy : public MachineSchedStrategy {
     28 
     29   const ScheduleDAGMI *DAG;
     30   const R600InstrInfo *TII;
     31   const R600RegisterInfo *TRI;
     32   MachineRegisterInfo *MRI;
     33 
     34   enum InstKind {
     35     IDAlu,
     36     IDFetch,
     37     IDOther,
     38     IDLast
     39   };
     40 
     41   enum AluKind {
     42     AluAny,
     43     AluT_X,
     44     AluT_Y,
     45     AluT_Z,
     46     AluT_W,
     47     AluT_XYZW,
     48     AluPredX,
     49     AluTrans,
     50     AluDiscarded, // LLVM Instructions that are going to be eliminated
     51     AluLast
     52   };
     53 
     54   std::vector<SUnit *> Available[IDLast], Pending[IDLast];
     55   std::vector<SUnit *> AvailableAlus[AluLast];
     56   std::vector<SUnit *> UnscheduledARDefs;
     57   std::vector<SUnit *> UnscheduledARUses;
     58   std::vector<SUnit *> PhysicalRegCopy;
     59 
     60   InstKind CurInstKind;
     61   int CurEmitted;
     62   InstKind NextInstKind;
     63 
     64   unsigned AluInstCount;
     65   unsigned FetchInstCount;
     66 
     67   int InstKindLimit[IDLast];
     68 
     69   int OccupedSlotsMask;
     70 
     71 public:
     72   R600SchedStrategy() :
     73     DAG(0), TII(0), TRI(0), MRI(0) {
     74   }
     75 
     76   virtual ~R600SchedStrategy() {
     77   }
     78 
     79   virtual void initialize(ScheduleDAGMI *dag);
     80   virtual SUnit *pickNode(bool &IsTopNode);
     81   virtual void schedNode(SUnit *SU, bool IsTopNode);
     82   virtual void releaseTopNode(SUnit *SU);
     83   virtual void releaseBottomNode(SUnit *SU);
     84 
     85 private:
     86   std::vector<MachineInstr *> InstructionsGroupCandidate;
     87 
     88   int getInstKind(SUnit *SU);
     89   bool regBelongsToClass(unsigned Reg, const TargetRegisterClass *RC) const;
     90   AluKind getAluKind(SUnit *SU) const;
     91   void LoadAlu();
     92   unsigned AvailablesAluCount() const;
     93   SUnit *AttemptFillSlot (unsigned Slot);
     94   void PrepareNextSlot();
     95   SUnit *PopInst(std::vector<SUnit*> &Q);
     96 
     97   void AssignSlot(MachineInstr *MI, unsigned Slot);
     98   SUnit* pickAlu();
     99   SUnit* pickOther(int QID);
    100   void MoveUnits(std::vector<SUnit *> &QSrc, std::vector<SUnit *> &QDst);
    101 };
    102 
    103 } // namespace llvm
    104 
    105 #endif /* R600MACHINESCHEDULER_H_ */
    106