| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.cpp | 63 const MCOperand &Disp = MI->getOperand(OpNo+1);
76 if (Disp.isExpr())
77 O << *Disp.getExpr();
79 assert(Disp.isImm() && "Expected immediate in displacement field");
80 O << Disp.getImm();
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 114 const MachineOperand &Disp = MI->getOperand(OpNum+1);
119 if (Disp.isImm() && !Base.getReg())
|
| MSP430ISelDAGToDAG.cpp | 46 int16_t Disp;
55 : BaseType(RegBase), Disp(0), GV(0), CP(0), BlockAddr(0),
71 errs() << " Disp " << Disp << '\n';
123 bool SelectAddr(SDValue Addr, SDValue &Base, SDValue &Disp);
149 AM.Disp += G->getOffset();
154 AM.Disp += CP->getOffset();
191 AM.Disp += Val;
234 AM.Disp += Offset;
249 SDValue &Base, SDValue &Disp) {
[all...] |
| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| SystemZInstPrinter.cpp | 21 void SystemZInstPrinter::printAddress(unsigned Base, int64_t Disp,
23 O << Disp;
160 uint64_t Disp = MI->getOperand(OpNum + 1).getImm();
162 O << Disp << '(' << Length;
|
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 35 /// with BP or SP and Disp being offsetted accordingly. The displacement may
50 int Disp;
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(0), GVOpFlags(0) {
76 MO.push_back(MachineOperand::CreateGA(GV, Disp, GVOpFlags));
78 MO.push_back(MachineOperand::CreateImm(Disp));
135 MIB.addGlobalAddress(AM.GV, AM.Disp, AM.GVOpFlags);
137 MIB.addImm(AM.Disp);
|
| X86FastISel.cpp | 406 uint64_t Disp = (int32_t)AM.Disp + (uint64_t)CI->getSExtValue();
408 if (isInt<32>(Disp)) {
409 AM.Disp = (uint32_t)Disp;
420 uint64_t Disp = (int32_t)AM.Disp;
431 Disp += SL->getElementOffset(cast<ConstantInt>(Op)->getZExtValue());
441 Disp += CI->getSExtValue() * S;
453 Disp += CI->getSExtValue() * S
[all...] |
| X86ISelDAGToDAG.cpp | 61 int32_t Disp;
72 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0),
115 dbgs() << " Disp " << Disp << '\n'
196 SDValue &Scale, SDValue &Index, SDValue &Disp,
200 SDValue &Scale, SDValue &Index, SDValue &Disp,
203 SDValue &Scale, SDValue &Index, SDValue &Disp,
206 SDValue &Scale, SDValue &Index, SDValue &Disp,
210 SDValue &Index, SDValue &Disp,
216 SDValue &Index, SDValue &Disp,
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 127 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
128 assert(isUInt<4>(Base) && isUInt<12>(Disp));
129 return (Base << 12) | Disp;
136 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
137 assert(isUInt<4>(Base) && isInt<20>(Disp));
138 return (Base << 20) | ((Disp & 0xfff) << 8) | ((Disp & 0xff000) >> 12);
145 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
147 assert(isUInt<4>(Base) && isUInt<12>(Disp) && isUInt<4>(Index));
148 return (Index << 16) | (Base << 12) | Disp;
[all...] |
| /external/libppp/src/ |
| ccp.h | 126 const char *(*Disp)(struct fsm_opt *); /* Use result immediately ! */
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 102 void EmitImmediate(const MCOperand &Disp, SMLoc Loc,
370 const MCOperand &Disp = MI.getOperand(Op+X86::AddrDisp);
398 EmitImmediate(Disp, MI.getLoc(), 4, MCFixupKind(FixupKind),
422 EmitImmediate(Disp, MI.getLoc(), 4, FK_Data_4, CurByte, OS, Fixups);
430 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
436 if (Disp.isImm()) {
437 if (!HasEVEX && isDisp8(Disp.getImm())) {
439 EmitImmediate(Disp, MI.getLoc(), 1, FK_Data_1, CurByte, OS, Fixups);
445 if (HasEVEX && isCDisp8(TSFlags, Disp.getImm(), CDisp8))
[all...] |
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 85 // Base + Disp + Index, where Base and Index are LLVM registers or 0.
94 const MCExpr *Disp;
151 const MCExpr *Disp, unsigned Index,
158 Op->Mem.Disp = Disp;
213 return isMem(RegKind, MemKind) && inRange(Mem.Disp, 0, 0xfff);
216 return isMem(RegKind, MemKind) && inRange(Mem.Disp, -524288, 524287);
246 addExpr(Inst, Mem.Disp);
252 addExpr(Inst, Mem.Disp);
259 addExpr(Inst, Mem.Disp);
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 55 // Base + Disp + Index + (IncludesDynAlloc ? ADJDYNALLOC : 0)
57 int64_t Disp;
62 : Form(form), DR(dr), Base(), Disp(0), Index(),
88 errs() << " Disp " << Disp;
152 SDValue &Base, SDValue &Disp);
154 SDValue &Base, SDValue &Disp, SDValue &Index);
158 // Base and Disp respectively.
160 SDValue &Base, SDValue &Disp);
164 // displacement and index in Base, Disp and Index respectively
[all...] |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 498 X86Operand *ParseIntelDotOperator(const MCExpr *Disp, const MCExpr *&NewDisp);
511 X86Operand *CreateMemForInlineAsm(unsigned SegReg, const MCExpr *Disp,
639 const MCExpr *Disp;
693 return Mem.Disp;
963 static X86Operand *CreateMem(const MCExpr *Disp, SMLoc StartLoc, SMLoc EndLoc,
968 Res->Mem.Disp = Disp;
980 static X86Operand *CreateMem(unsigned SegReg, const MCExpr *Disp,
995 Res->Mem.Disp = Disp;
[all...] |
