| /art/compiler/dex/quick/mips/ |
| assemble_mips.cc | 107 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP,
111 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR |
115 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_USE01 |
119 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
123 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
127 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
131 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
135 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
139 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
143 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_USE01
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| GlobalOptimizations.cpp | 104 /* Since instructions with IS_BRANCH flag set will have its */
118 if (EncodingMap[nextLIR->opcode].flags & IS_BRANCH) {
280 EncodingMap[thisLIR->opcode].flags & IS_BRANCH)
320 !(EncodingMap[targetLIR->opcode].flags & IS_BRANCH)) {
393 !(EncodingMap[thisLIR->opcode].flags & IS_BRANCH)) {
406 EncodingMap[thisLIR->opcode].flags & IS_BRANCH) {
|
| Assemble.cpp | 103 kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH,
107 kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | REG_DEF_LR,
111 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_USE01,
115 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
119 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
123 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
127 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
131 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
135 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
139 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_USE01
[all...] |
| CodegenCommon.cpp | 166 if (flags & IS_BRANCH) {
243 assert(flags & IS_BRANCH);
|
| MipsLIR.h | 521 #define IS_BRANCH (1 << kIsBranch)
|
| /art/compiler/dex/quick/ |
| local_optimizations.cc | 91 (target_flags & IS_BRANCH) ||
123 stop_use_reg_mask = (IS_BRANCH | this_lir->use_mask) & ~ENCODE_MEM;
243 if (sink_distance > 0 && (flags & IS_BRANCH) && (flags & USES_CCODES)) {
|
| mir_to_lir-inl.h | 163 if (flags & IS_BRANCH) {
|
| mir_to_lir.h | 37 #define IS_BRANCH (1ULL << kIsBranch)
[all...] |
| /art/compiler/dex/quick/arm/ |
| assemble_arm.cc | 117 kFmtUnused, -1, -1, IS_TERTIARY_OP | IS_BRANCH | NEEDS_FIXUP,
144 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | USES_CCODES |
148 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP,
157 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,
161 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR |
165 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR |
169 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR,
173 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR,
178 IS_UNARY_OP | REG_USE0 | IS_BRANCH | REG_DEF_LR,
182 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| Assemble.cpp | 118 kFmtUnused, -1, -1, IS_TERTIARY_OP | IS_BRANCH,
145 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | USES_CCODES,
149 kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH,
158 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,
162 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR,
166 kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR,
170 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR,
174 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR,
179 IS_UNARY_OP | REG_USE0 | IS_BRANCH | REG_DEF_LR,
183 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH,
[all...] |
| CodegenCommon.cpp | 148 if (flags & IS_BRANCH) {
237 assert(flags & IS_BRANCH);
|
| ArmLIR.h | 677 #define IS_BRANCH (1 << kIsBranch)
[all...] |
| /art/compiler/dex/quick/x86/ |
| assemble_x86.cc | 27 { kX86Bkpt, kNullary, NO_OPERAND | IS_BRANCH, { 0, 0, 0xCC, 0, 0, 0, 0, 0 }, "int 3", "" },
[all...] |
