| /art/compiler/dex/quick/x86/ |
| assemble_x86.cc | 43 { kX86 ## opname ## 8RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, 0, r8_rm8, 0, 0, 0, 0, 0 }, #opname "8RT", "!0r,fs:[!1d]" }, \
44 { kX86 ## opname ## 8RI, kRegImm, IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_i8, 0, 0, rm8_i8_modrm, ax8_i8, 1 }, #opname "8RI", "!0r,!1d" }, \
45 { kX86 ## opname ## 8MI, kMemImm, mem_use | IS_TERTIARY_OP | REG_USE0 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_i8, 0, 0, rm8_i8_modrm, 0, 1 }, #opname "8MI", "[!0r+!1d],!2d" }, \
55 { kX86 ## opname ## 16RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, 0x66, r32_rm32, 0, 0, 0, 0, 0 }, #opname "16RT", "!0r,fs:[!1d]" }, \
56 { kX86 ## opname ## 16RI, kRegImm, IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { 0x66, 0, rm32_i32, 0, 0, rm32_i32_modrm, ax32_i32, 2 }, #opname "16RI", "!0r,!1d" }, \
57 { kX86 ## opname ## 16MI, kMemImm, mem_use | IS_TERTIARY_OP | REG_USE0 | SETS_CCODES | uses_ccodes, { 0x66, 0, rm32_i32, 0, 0, rm32_i32_modrm, 0, 2 }, #opname "16MI", "[!0r+!1d],!2d" }, \
60 { kX86 ## opname ## 16RI8, kRegImm, IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { 0x66, 0, rm32_i8, 0, 0, rm32_i8_modrm, 0, 1 }, #opname "16RI8", "!0r,!1d" }, \
61 { kX86 ## opname ## 16MI8, kMemImm, mem_use | IS_TERTIARY_OP | REG_USE0 | SETS_CCODES | uses_ccodes, { 0x66, 0, rm32_i8, 0, 0, rm32_i8_modrm, 0, 1 }, #opname "16MI8", "[!0r+!1d],!2d" }, \
71 { kX86 ## opname ## 32RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, 0, r32_rm32, 0, 0, 0, 0, 0 }, #opname "32RT", "!0r,fs:[!1d]" }, \
72 { kX86 ## opname ## 32RI, kRegImm, IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { 0, 0, rm32_i32, 0, 0, rm32_i32_modrm, ax32_i32, 4 }, (…)
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| MipsLIR.h | 528 #define REG_USE0 (1 << kRegUse0)
546 #define REG_USE01 (REG_USE0 | REG_USE1)
547 #define REG_USE02 (REG_USE0 | REG_USE2)
552 #define REG_DEF0_USE0 (REG_DEF0 | REG_USE0)
|
| CodegenCommon.cpp | 204 if (flags & (REG_USE0 | REG_USE1 | REG_USE2 | REG_USE3)) {
253 if (flags & (REG_USE0 | REG_USE1 | REG_USE2 | REG_USE3)) {
|
| Assemble.cpp | 115 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
119 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
123 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
127 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
131 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
135 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
161 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0,
392 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | REG_DEF1,
[all...] |
| GlobalOptimizations.cpp | 165 if ((flags & REG_USE0) &&
|
| /art/compiler/dex/quick/arm/ |
| assemble_arm.cc | 178 IS_UNARY_OP | REG_USE0 | IS_BRANCH | REG_DEF_LR,
190 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | SETS_CCODES,
343 IS_BINARY_OP | REG_DEF0 | REG_USE0 | REG_USE_LIST1 | IS_STORE,
355 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE0 | REG_USE_SP
508 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH |
512 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH |
[all...] |
| /art/compiler/dex/quick/mips/ |
| assemble_mips.cc | 119 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
123 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
127 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
131 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
135 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
139 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
165 kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_USE0 |
395 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | REG_DEF1,
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 684 #define REG_USE0 (1 << kRegUse0)
702 #define REG_USE01 (REG_USE0 | REG_USE1)
705 #define REG_DEF0_USE0 (REG_DEF0 | REG_USE0)
[all...] |
| CodegenCommon.cpp | 186 if (flags & (REG_USE0 | REG_USE1 | REG_USE2 | REG_USE3)) {
245 if (flags & (REG_USE0 | REG_USE1 | REG_USE2 | REG_USE3)) {
|
| Assemble.cpp | 179 IS_UNARY_OP | REG_USE0 | IS_BRANCH | REG_DEF_LR,
191 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | SETS_CCODES,
344 IS_BINARY_OP | REG_DEF0 | REG_USE0 | REG_USE_LIST1 | IS_STORE,
356 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE0 | REG_USE_SP
508 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH,
512 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH,
[all...] |
| /art/compiler/dex/quick/ |
| local_optimizations.cc | 93 ((target_flags & (REG_USE0 | REG_USE1 | REG_USE2)) ==
94 (REG_USE0 | REG_USE1 | REG_USE2)) || // Skip wide stores.
|
| mir_to_lir-inl.h | 181 if (flags & (REG_USE0 | REG_USE1 | REG_USE2 | REG_USE3)) {
|
| mir_to_lir.h | 58 #define REG_USE0 (1ULL << kRegUse0)
80 #define REG_DEF0_USE0 (REG_DEF0 | REG_USE0)
89 #define REG_USE01 (REG_USE0 | REG_USE1)
90 #define REG_USE02 (REG_USE0 | REG_USE2)
[all...] |
