/art/compiler/dex/quick/arm/ |
assemble_arm.cc | 351 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 363 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 371 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, [all...] |
/dalvik/vm/compiler/codegen/arm/ |
Assemble.cpp | 352 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 364 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, 372 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_USE012 | IS_STORE, [all...] |
ArmLIR.h | 703 #define REG_USE012 (REG_USE01 | REG_USE2) [all...] |
/dalvik/vm/compiler/codegen/mips/ |
MipsLIR.h | 548 #define REG_USE012 (REG_USE01 | REG_USE2)
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/art/compiler/dex/quick/x86/ |
assemble_x86.cc | 42 { kX86 ## opname ## 8RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0, 0, r8_rm8, 0, 0, 0, 0, 0 }, #opname "8RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 54 { kX86 ## opname ## 16RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0x66, 0, r32_rm32, 0, 0, 0, 0, 0 }, #opname "16RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 70 { kX86 ## opname ## 32RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0, 0, r32_rm32, 0, 0, 0, 0, 0 }, #opname "32RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 252 { kX86 ## opname ## RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012, { prefix, 0, 0x0F, opcode, 0, 0, 0, 0 }, #opname "RA", "!0r,[!1r+!2r<<!3d+!4d]" } [all...] |
/art/compiler/dex/quick/ |
mir_to_lir.h | 87 #define REG_USE012 (REG_USE01 | REG_USE2) [all...] |