| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 340 EVT RegVT = VA.getLocVT();
341 switch (RegVT.getSimpleVT().SimpleTy) {
346 << RegVT.getSimpleVT().SimpleTy << "\n";
353 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
359 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue,
362 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | 268 First(F), Range(R), SValue(SV), Reg(Rg), RegVT(RgVT), Emitted(E),
274 MVT RegVT;
|
| SelectionDAGBuilder.cpp | 611 MVT regvt, EVT valuevt)
612 : ValueVTs(1, valuevt), RegVTs(1, regvt), Regs(regs) {}
[all...] |
| LegalizeVectorOps.cpp | 535 EVT RegVT = Value.getValueType();
536 EVT RegSclVT = RegVT.getScalarType();
|
| LegalizeDAG.cpp | 331 MVT RegVT =
336 unsigned RegBytes = RegVT.getSizeInBits() / 8;
340 SDValue StackPtr = DAG.CreateStackTemporary(StoredVT, RegVT);
353 SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
375 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Store, StackPtr,
457 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), intVT);
459 unsigned RegBytes = RegVT.getSizeInBits() / 8;
463 SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT);
473 SDValue Load = DAG.getLoad(RegVT, dl, Chain, Ptr,
491 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr
[all...] |
| LegalizeIntegerTypes.cpp | 719 MVT RegVT = TLI.getRegisterType(*DAG.getContext(), VT);
721 // The argument is passed as NumRegs registers of type RegVT.
725 Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2),
741 DAG.getConstant(i * RegVT.getSizeInBits(),
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 855 EVT RegVT = VA.getLocVT();
856 if (RegVT == MVT::i8 || RegVT == MVT::i16 ||
857 RegVT == MVT::i32 || RegVT == MVT::f32) {
861 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
862 } else if (RegVT == MVT::i64) {
866 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
