/art/compiler/dex/quick/x86/ |
assemble_x86.cc | 37 { kX86 ## opname ## 8MR, kMemReg, mem_use | IS_TERTIARY_OP | REG_USE02 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_r8, 0, 0, 0, 0, 0 }, #opname "8MR", "[!0r+!1d],!2r" }, \ 38 { kX86 ## opname ## 8AR, kArrayReg, mem_use | IS_QUIN_OP | REG_USE014 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_r8, 0, 0, 0, 0, 0 }, #opname "8AR", "[!0r+!1r<<!2d+!3d],!4r" }, \ 39 { kX86 ## opname ## 8TR, kThreadReg, mem_use | IS_BINARY_OP | REG_USE1 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, 0, rm8_r8, 0, 0, 0, 0, 0 }, #opname "8TR", "fs:[!0d],!1r" }, \ 40 { kX86 ## opname ## 8RR, kRegReg, IS_BINARY_OP | reg_def | REG_USE01 | SETS_CCODES | uses_ccodes, { 0, 0, r8_rm8, 0, 0, 0, 0, 0 }, #opname "8RR", "!0r,!1r" }, \ 41 { kX86 ## opname ## 8RM, kRegMem, IS_LOAD | IS_TERTIARY_OP | reg_def | REG_USE01 | SETS_CCODES | uses_ccodes, { 0, 0, r8_rm8, 0, 0, 0, 0, 0 }, #opname "8RM", "!0r,[!1r+!2d]" }, \ 42 { kX86 ## opname ## 8RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES | uses_ccodes, { 0, 0, r8_rm8, 0, 0, 0, 0, 0 }, #opname "8RA", "!0r,[!1r+!2r<<!3d+!4d]" }, \ 43 { kX86 ## opname ## 8RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { THREAD_PREFIX, 0, r8_rm8, 0, 0, 0, 0, 0 }, #opname "8RT", "!0r,fs:[!1d]" }, \ 44 { kX86 ## opname ## 8RI, kRegImm, IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_i8, 0, 0, rm8_i8_modrm, ax8_i8, 1 }, #opname "8RI", "!0r,!1d" }, \ 45 { kX86 ## opname ## 8MI, kMemImm, mem_use | IS_TERTIARY_OP | REG_USE0 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_i8, 0, 0, rm8_i8_modrm, 0, 1 }, #opname "8MI", "[!0r+!1d],!2d" }, \ 46 { kX86 ## opname ## 8AI, kArrayImm, mem_use | IS_QUIN_OP | REG_USE01 | SETS_CCODES | uses_ccodes, { 0, 0, rm8_i8, 0, 0, rm8_i8_modrm, 0, 1 }, #opname "8AI", "[!0r+! (…) [all...] |
/art/compiler/dex/quick/arm/ |
assemble_arm.cc | 86 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES | USES_CCODES, 91 IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES, 96 IS_BINARY_OP | REG_DEF0_USE0 | SETS_CCODES, 101 IS_TERTIARY_OP | REG_DEF0_USE12 | SETS_CCODES, 130 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES, 135 IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES, 140 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES, 153 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES, 186 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES, 190 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | SETS_CCODES, [all...] |
/dalvik/vm/compiler/codegen/arm/ |
Assemble.cpp | 87 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES | USES_CCODES, 92 IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES, 97 IS_BINARY_OP | REG_DEF0_USE0 | SETS_CCODES, 102 IS_TERTIARY_OP | REG_DEF0_USE12 | SETS_CCODES, 131 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES, 136 IS_TERTIARY_OP | REG_DEF0_USE1 | SETS_CCODES, 141 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES, 154 IS_BINARY_OP | REG_DEF0_USE01 | SETS_CCODES, 187 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE01 | SETS_CCODES, 191 kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | SETS_CCODES, [all...] |
ArmLIR.h | 698 #define SETS_CCODES (1 << kSetsCCodes) [all...] |
CodegenCommon.cpp | 177 if (flags & SETS_CCODES) {
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/art/compiler/dex/quick/ |
mir_to_lir-inl.h | 177 if (flags & SETS_CCODES) {
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mir_to_lir.h | 73 #define SETS_CCODES (1ULL << kSetsCCodes) [all...] |
/dalvik/vm/compiler/codegen/mips/ |
CodegenCommon.cpp | 195 if (flags & SETS_CCODES) {
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MipsLIR.h | 542 #define SETS_CCODES (1 << kSetsCCodes)
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