| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 211 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
212 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0 },
216 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 },
219 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 3 },
220 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i16, 3 },
248 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
249 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
263 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 },
264 { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 },
496 { ISD::SDIV, MVT::v4i16, ReciprocalDivCost}
[all...] |
| ARMISelLowering.cpp | 459 addDRTypeForNEON(MVT::v4i16);
549 setOperationAction(ISD::SDIV, MVT::v4i16, Custom);
551 setOperationAction(ISD::UDIV, MVT::v4i16, Custom);
559 setOperationAction(ISD::SINT_TO_FP, MVT::v4i16, Custom);
560 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom);
561 setOperationAction(ISD::FP_TO_UINT, MVT::v4i16, Custom);
562 setOperationAction(ISD::FP_TO_SINT, MVT::v4i16, Custom);
582 setOperationAction(ISD::CTPOP, MVT::v4i16, Custom);
609 // It is legal to extload from v4i8 to v4i16 or v4i32.
611 MVT::v4i16, MVT::v2i16
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 78 v4i16 = 27, // 4 x i16 enumerator in enum:llvm::MVT::SimpleValueType
204 return (SimpleTy == MVT::v8i8 || SimpleTy == MVT::v4i16 ||
276 case v4i16:
325 case v4i16:
381 case v4i16:
503 if (NumElements == 4) return MVT::v4i16;
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 418 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i16, 3 },
422 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i16, 3 },
431 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
435 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i16, 2 },
444 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i16, 6 },
|
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 145 case MVT::v4i16: return "v4i16";
208 case MVT::v4i16: return VectorType::get(Type::getInt16Ty(Context), 4);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 60 (int)MVT::v4i16,
88 (int)MVT::v4i16,
210 setOperationAction(ISD::UDIV, MVT::v4i16, Expand);
668 } else if (OVT == MVT::v4i16) {
|
| /external/llvm/lib/Target/R600/ |
| AMDILISelLowering.cpp | 52 (int)MVT::v4i16,
77 (int)MVT::v4i16,
193 setOperationAction(ISD::UDIV, MVT::v4i16, Expand);
567 } else if (OVT == MVT::v4i16) {
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 60 (int)MVT::v4i16,
88 (int)MVT::v4i16,
210 setOperationAction(ISD::UDIV, MVT::v4i16, Expand);
668 } else if (OVT == MVT::v4i16) {
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 86 case MVT::v4i16: return "MVT::v4i16";
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 59 case MVT::v4i16:
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 61 addRegisterClass(MVT::v4i16, &AArch64::VPR64RegClass);
275 setOperationAction(ISD::BUILD_VECTOR, MVT::v4i16, Custom);
287 setOperationAction(ISD::SETCC, MVT::v4i16, Custom);
[all...] |
