| /external/llvm/lib/Target/Mips/ |
| MipsJITInfo.h | 62 void Initialize(const MachineFunction &MF, bool isPIC,
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| MipsModuleISelDAGToDAG.h | 48 virtual bool runOnMachineFunction(MachineFunction &MF);
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| MipsSEFrameLowering.cpp | 38 ExpandPseudo(MachineFunction &MF);
51 MachineFunction &MF;
57 : MF(MF_), MRI(MF.getRegInfo()) {}
62 for (MachineFunction::iterator BB = MF.begin(), BBEnd = MF.end();
119 *static_cast<const MipsSEInstrInfo*>(MF.getTarget().getInstrInfo());
121 *static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
139 *static_cast<const MipsSEInstrInfo*>(MF.getTarget().getInstrInfo());
141 *static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo())
[all...] |
| MipsLongBranch.cpp | 87 MachineFunction *MF;
149 MF->CreateMachineBasicBlock(MBB->getBasicBlock());
157 MF->insert(llvm::next(MachineFunction::iterator(MBB)), NewMBB);
166 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E;)
169 MF->RenumberBlocks();
171 MBBInfos.resize(MF->size());
176 MachineBasicBlock *MBB = MF->getBlockNumbered(I);
250 MachineBasicBlock *LongBrMBB = MF->CreateMachineBasicBlock(BB);
255 MF->insert(FallThroughMBB, LongBrMBB)
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600RegisterInfo.h | 31 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
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| SIInstrInfo.h | 43 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
51 virtual int getIndirectIndexBegin(const MachineFunction &MF) const;
53 virtual int getIndirectIndexEnd(const MachineFunction &MF) const;
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| AMDGPUInstrInfo.h | 92 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF,
96 MachineInstr *foldMemoryOperandImpl(MachineFunction &MF,
103 bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
142 virtual MachineInstr* getMovImmInstr(MachineFunction *MF, unsigned DstReg,
149 virtual int getIndirectIndexBegin(const MachineFunction &MF) const = 0;
153 virtual int getIndirectIndexEnd(const MachineFunction &MF) const = 0;
197 virtual void convertToISA(MachineInstr & MI, MachineFunction &MF,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600RegisterInfo.h | 32 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
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| /external/llvm/lib/CodeGen/ |
| InterferenceCache.h | 27 MachineFunction *MF;
51 /// MF - The current function.
52 MachineFunction *MF;
98 void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) {
101 MF = mf;
121 const MachineFunction *MF);
150 InterferenceCache() : TRI(0), LIUArray(0), MF(0), RoundRobin(0) {}
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| DeadMachineInstructionElim.cpp | 30 virtual bool runOnMachineFunction(MachineFunction &MF);
86 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) {
88 MRI = &MF.getRegInfo();
89 TRI = MF.getTarget().getRegisterInfo();
90 TII = MF.getTarget().getInstrInfo();
95 for (MachineFunction::reverse_iterator I = MF.rbegin(), E = MF.rend();
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| ProcessImplicitDefs.cpp | 137 bool ProcessImplicitDefs::runOnMachineFunction(MachineFunction &MF) {
140 << "********** Function: " << MF.getName() << '\n');
144 TII = MF.getTarget().getInstrInfo();
145 TRI = MF.getTarget().getRegisterInfo();
146 MRI = &MF.getRegInfo();
150 for (MachineFunction::iterator MFI = MF.begin(), MFE = MF.end();
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| RegisterClassInfo.cpp | 32 RegisterClassInfo::RegisterClassInfo() : Tag(0), MF(0), TRI(0), CalleeSaved(0)
35 void RegisterClassInfo::runOnMachineFunction(const MachineFunction &mf) {
37 MF = &mf;
40 if (MF->getTarget().getRegisterInfo() != TRI) {
41 TRI = MF->getTarget().getRegisterInfo();
49 // Does this MF have different CSRs?
50 const MCPhysReg *CSR = TRI->getCalleeSavedRegs(MF);
64 const BitVector &RR = MF->getRegInfo().getReservedRegs();
95 ArrayRef<MCPhysReg> RawOrder = RC->getRawAllocationOrder(*MF);
[all...] |
| StackSlotColoring.cpp | 101 virtual bool runOnMachineFunction(MachineFunction &MF);
105 void ScanForSpillSlotRefs(MachineFunction &MF);
108 bool ColorSlots(MachineFunction &MF);
110 MachineFunction &MF);
138 void StackSlotColoring::ScanForSpillSlotRefs(MachineFunction &MF) {
142 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
269 bool StackSlotColoring::ColorSlots(MachineFunction &MF) {
321 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end()
[all...] |
| GCStrategy.cpp | 74 void FindSafePoints(MachineFunction &MF);
80 void FindStackOffsets(MachineFunction &MF);
88 bool runOnMachineFunction(MachineFunction &MF);
378 void GCMachineCodeAnalysis::FindSafePoints(MachineFunction &MF) {
379 for (MachineFunction::iterator BBI = MF.begin(),
380 BBE = MF.end(); BBI != BBE; ++BBI)
387 void GCMachineCodeAnalysis::FindStackOffsets(MachineFunction &MF) {
394 if (MF.getFrameInfo()->isDeadObjectIndex(RI->Num)) {
397 RI->StackOffset = TFI->getFrameIndexOffset(MF, RI->Num);
403 bool GCMachineCodeAnalysis::runOnMachineFunction(MachineFunction &MF) {
[all...] |
| LiveRangeCalc.h | 37 const MachineFunction *MF;
130 LiveRangeCalc() : MF(0), MRI(0), Indexes(0), DomTree(0), Alloc(0) {}
144 void reset(const MachineFunction *MF,
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| VirtRegMap.cpp | 52 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
53 MRI = &mf.getRegInfo();
54 TII = mf.getTarget().getInstrInfo();
55 TRI = mf.getTarget().getRegisterInfo();
56 MF = &mf;
67 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs();
74 int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
102 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
111 (SS >= MF->getFrameInfo()->getObjectIndexBegin())) &
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64BranchFixupPass.cpp | 132 MachineFunction *MF;
138 virtual bool runOnMachineFunction(MachineFunction &MF);
164 for (MachineFunction::iterator MBBI = MF->begin(), E = MF->end();
191 bool AArch64BranchFixup::runOnMachineFunction(MachineFunction &mf) {
192 MF = &mf;
194 TII = (const AArch64InstrInfo*)MF->getTarget().getInstrInfo();
197 MF->getRegInfo().invalidateLiveness();
201 MF->RenumberBlocks()
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 103 X86RegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
177 X86RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind)
196 const Function *F = MF.getFunction();
217 MachineFunction &MF) const {
218 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
220 unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0;
236 X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
237 switch (MF->getFunction()->getCallingConv()) {
267 bool CallsEHReturn = MF->getMMI().callsEHReturn();
313 BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXPrologEpilogPass.cpp | 34 virtual bool runOnMachineFunction(MachineFunction &MF);
47 bool NVPTXPrologEpilogPass::runOnMachineFunction(MachineFunction &MF) {
48 const TargetMachine &TM = MF.getTarget();
53 calculateFrameObjectOffsets(MF);
55 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB) {
68 TFI.emitPrologue(MF);
70 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
73 TFI.emitEpilogue(MF, *I)
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 35 unsigned determineFrameLayout(MachineFunction &MF,
41 void emitPrologue(MachineFunction &MF) const;
42 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
44 bool hasFP(const MachineFunction &MF) const;
45 bool needsFP(const MachineFunction &MF) const;
46 void replaceFPWithRealFP(MachineFunction &MF) const;
48 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
50 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
52 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const;
59 void eliminateCallFramePseudoInstr(MachineFunction &MF,
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 47 *MF)
72 BitVector HexagonRegisterInfo::getReservedRegs(const MachineFunction &MF)
91 HexagonRegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
130 MachineFunction &MF = *MI.getParent()->getParent();
132 *static_cast<const HexagonInstrInfo*>(MF.getTarget().getInstrInfo());
133 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
134 MachineFrameInfo &MFI = *MF.getFrameInfo();
136 unsigned FrameReg = getFrameRegister(MF);
137 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
138 if (!TFI->hasFP(MF)) {
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMInstrInfo.cpp | 99 virtual bool runOnMachineFunction(MachineFunction &MF) {
100 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
105 static_cast<const ARMTargetMachine *>(&MF.getTarget());
109 LLVMContext *Context = &MF.getFunction()->getContext();
117 unsigned Idx = MF.getConstantPool()->getConstantPoolIndex(CPV, Align);
119 MachineBasicBlock &FirstMBB = MF.front();
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| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/reference/vc/m4p10/src/ |
| omxVCM4P10_TransformQuant_LumaDC.c | 59 OMX_U32 QbitsPlusOne, Two_f, MF;
102 MF = armVCM4P10_MFMatrix [iQP % 6][0];
109 Value = (armAbs((m2[j][i]/* + 1*/) / 2) * MF + Two_f) >> QbitsPlusOne;
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 36 virtual bool runOnMachineFunction(MachineFunction &MF);
51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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| SIInstrInfo.h | 45 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
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