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    Searched refs:LiveRegs (Results 1 - 4 of 4) sorted by null

  /external/llvm/lib/CodeGen/
ExecutionDepsFix.cpp 135 LiveReg *LiveRegs;
175 // LiveRegs manipulations.
249 /// Set LiveRegs[rx] = dv, updating reference counts.
252 assert(LiveRegs && "Must enter basic block first.");
254 if (LiveRegs[rx].Value == dv)
256 if (LiveRegs[rx].Value)
257 release(LiveRegs[rx].Value);
258 LiveRegs[rx].Value = retain(dv);
264 assert(LiveRegs && "Must enter basic block first.");
265 if (!LiveRegs[rx].Value
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RegisterPressure.cpp 235 LiveRegs.PhysRegs.clear();
236 LiveRegs.PhysRegs.setUniverse(TRI->getNumRegs());
237 LiveRegs.VirtRegs.clear();
238 LiveRegs.VirtRegs.setUniverse(MRI->getNumVirtRegs());
278 P.LiveInRegs.reserve(LiveRegs.PhysRegs.size() + LiveRegs.VirtRegs.size());
279 P.LiveInRegs.append(LiveRegs.PhysRegs.begin(), LiveRegs.PhysRegs.end());
281 LiveRegs.VirtRegs.begin(), E = LiveRegs.VirtRegs.end(); I != E; ++I
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PostRASchedulerList.cpp 124 /// LiveRegs - true if the register is live.
125 BitVector LiveRegs;
200 LiveRegs(TRI->getNumRegs())
419 LiveRegs.reset();
430 LiveRegs.set(*SubRegs);
444 if (LiveRegs.test(MO.getReg())) {
456 if (LiveRegs.test(*SubRegs)) {
491 LiveRegs.clearBitsNotInMask(MO.getRegMask());
502 LiveRegs.reset(*SubRegs);
520 if (LiveRegs.test(*SubRegs))
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  /external/llvm/include/llvm/CodeGen/
RegisterPressure.h 202 LiveRegSet LiveRegs;

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