| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 38 SmallVectorImpl<MCFixup> &Fixups) const
44 SmallVectorImpl<MCFixup> &Fixups) const;
47 // MO in MI. Fixups is the list of fixups against MI.
49 SmallVectorImpl<MCFixup> &Fixups) const;
56 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
60 SmallVectorImpl<MCFixup> &Fixups) const;
62 SmallVectorImpl<MCFixup> &Fixups) const;
64 SmallVectorImpl<MCFixup> &Fixups) const
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 48 SmallVectorImpl<MCFixup> &Fixups) const;
50 SmallVectorImpl<MCFixup> &Fixups) const;
52 SmallVectorImpl<MCFixup> &Fixups) const;
54 SmallVectorImpl<MCFixup> &Fixups) const;
56 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
60 SmallVectorImpl<MCFixup> &Fixups) const;
62 SmallVectorImpl<MCFixup> &Fixups) const;
64 SmallVectorImpl<MCFixup> &Fixups) const;
66 SmallVectorImpl<MCFixup> &Fixups) const
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 42 SmallVectorImpl<MCFixup> &Fixups) const;
45 SmallVectorImpl<MCFixup> &Fixups) const;
49 SmallVectorImpl<MCFixup> &Fixups) const {
50 return getOffsetUImm12OpValue(MI, OpIdx, Fixups, MemSize);
54 SmallVectorImpl<MCFixup> &Fixups,
58 SmallVectorImpl<MCFixup> &Fixups) const;
60 SmallVectorImpl<MCFixup> &Fixups) const;
65 template<AArch64::Fixups fixupDesired>
67 SmallVectorImpl<MCFixup> &Fixups) const;
70 SmallVectorImpl<MCFixup> &Fixups) const
[all...] |
| AArch64FixupKinds.h | 10 // This file describes the LLVM fixups applied to MCInsts in the AArch64
22 enum Fixups {
99 // Produce the special fixups used by the general-dynamic TLS model.
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 29 SmallVectorImpl<MCFixup> &Fixups) const;
32 SmallVectorImpl<MCFixup> &Fixups) const {
37 SmallVectorImpl<MCFixup> &Fixups) const {
41 SmallVectorImpl<MCFixup> &Fixups) const {
48 SmallVectorImpl<MCFixup> &Fixups) const {
52 SmallVectorImpl<MCFixup> &Fixups) const {
|
| R600MCCodeEmitter.cpp | 54 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
151 SmallVectorImpl<MCFixup> &Fixups) const {
153 EmitTexInstr(MI, Fixups, OS);
164 uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
176 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups);
186 EmitALUInstr(MI, Fixups, OS)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 29 SmallVectorImpl<MCFixup> &Fixups) const;
32 SmallVectorImpl<MCFixup> &Fixups) const {
37 SmallVectorImpl<MCFixup> &Fixups) const {
41 SmallVectorImpl<MCFixup> &Fixups) const {
48 SmallVectorImpl<MCFixup> &Fixups) const {
52 SmallVectorImpl<MCFixup> &Fixups) const {
|
| R600MCCodeEmitter.cpp | 54 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
151 SmallVectorImpl<MCFixup> &Fixups) const {
153 EmitTexInstr(MI, Fixups, OS);
164 uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
176 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups);
186 EmitALUInstr(MI, Fixups, OS)
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 70 SmallVectorImpl<MCFixup> &Fixups) const;
75 SmallVectorImpl<MCFixup> &Fixups) const;
81 SmallVectorImpl<MCFixup> &Fixups) const;
85 SmallVectorImpl<MCFixup> &Fixups) const;
90 SmallVectorImpl<MCFixup> &Fixups) const;
95 SmallVectorImpl<MCFixup> &Fixups) const;
99 SmallVectorImpl<MCFixup> &Fixups) const;
103 SmallVectorImpl<MCFixup> &Fixups) const;
107 SmallVectorImpl<MCFixup> &Fixups) const;
112 SmallVectorImpl<MCFixup> &Fixups) const
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 63 SmallVectorImpl<MCFixup> &Fixups) const;
68 SmallVectorImpl<MCFixup> &Fixups) const;
74 SmallVectorImpl<MCFixup> &Fixups) const;
80 SmallVectorImpl<MCFixup> &Fixups) const;
85 SmallVectorImpl<MCFixup> &Fixups) const;
88 SmallVectorImpl<MCFixup> &Fixups) const;
90 SmallVectorImpl<MCFixup> &Fixups) const;
92 SmallVectorImpl<MCFixup> &Fixups) const;
95 getExprOpValue(const MCExpr *Expr,SmallVectorImpl<MCFixup> &Fixups) const;
183 SmallVectorImpl<MCFixup> &Fixups) cons
[all...] |
| /external/chromium_org/tools/cr/cr/fixups/ |
| __init__.py | 5 """A package for all the version fixups.
|
| arch.py | 5 """A module for architecture output directory fixups."""
11 """Base class helper for CR_ARCH value fixups."""
|
| /ndk/tests/device/test-stlport_shared-exception/jni/ |
| cleanup1_1.cpp | 2 // Bug: obj gets destroyed twice because the fixups for the return are
|
| /ndk/tests/device/test-stlport_static-exception/jni/ |
| cleanup1_1.cpp | 2 // Bug: obj gets destroyed twice because the fixups for the return are
|
| /external/llvm/test/MC/ELF/ |
| no-fixup.s | 4 // Test that we create no fixups for this file since "a" and "b"
|
| /external/llvm/lib/MC/ |
| MCPureStreamer.cpp | 197 // Add the fixups and data.
201 SmallVector<MCFixup, 4> Fixups;
204 getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups);
208 IF->getFixups() = Fixups;
214 SmallVector<MCFixup, 4> Fixups;
217 getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups);
220 // Add the fixups and data.
221 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
222 Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size())
[all...] |
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 30 SmallVectorImpl<MCFixup> &Fixups) const;
33 SmallVectorImpl<MCFixup> &Fixups) const {
|
| R600MCCodeEmitter.cpp | 48 SmallVectorImpl<MCFixup> &Fixups) const;
52 SmallVectorImpl<MCFixup> &Fixups) const;
91 SmallVectorImpl<MCFixup> &Fixups) const {
100 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups);
124 uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups);
134 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups);
|
| SIMCCodeEmitter.cpp | 58 SmallVectorImpl<MCFixup> &Fixups) const;
62 SmallVectorImpl<MCFixup> &Fixups) const;
128 SmallVectorImpl<MCFixup> &Fixups) const {
130 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups);
171 SmallVectorImpl<MCFixup> &Fixups) const {
178 Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
|
| /bootable/recovery/minzip/ |
| SysUtil.h | 33 * The segment is read-write, allowing VM fixups. (It should be modified
|
| /external/llvm/include/llvm/MC/ |
| MCCodeEmitter.h | 38 SmallVectorImpl<MCFixup> &Fixups) const = 0;
|
| MCFixup.h | 42 // Limit range of target fixups, in case we want to pack more efficiently
51 /// Fixups are used any time the target instruction encoder needs to represent
57 /// During the process of relaxation, the assembler will apply fixups as
59 /// fixups become relocations in the object file (or errors, if the fixup cannot
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86FixupKinds.h | 17 enum Fixups {
|
| /external/llvm/test/MC/COFF/ |
| switch-relocations.ll | 2 ; relax the fixups that are created for jump tables on x86-64. See PR7960.
|
| /external/llvm/test/Transforms/LoopStrengthReduce/ARM/ |
| 2012-06-15-lsr-noaddrmode.ll | 13 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
21 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
26 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
34 ; LSR Use: Kind=Special, Offsets={0}, all-fixups-outside-loop, widest fixup type: i32
|
