1 //===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // CodeEmitter interface for R600 and SI codegen. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef AMDGPUCODEEMITTER_H 15 #define AMDGPUCODEEMITTER_H 16 17 #include "llvm/MC/MCCodeEmitter.h" 18 #include "llvm/Support/raw_ostream.h" 19 20 namespace llvm { 21 22 class MCInst; 23 class MCOperand; 24 25 class AMDGPUMCCodeEmitter : public MCCodeEmitter { 26 public: 27 28 uint64_t getBinaryCodeForInstr(const MCInst &MI, 29 SmallVectorImpl<MCFixup> &Fixups) const; 30 31 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, 32 SmallVectorImpl<MCFixup> &Fixups) const { 33 return 0; 34 } 35 36 virtual unsigned GPR4AlignEncode(const MCInst &MI, unsigned OpNo, 37 SmallVectorImpl<MCFixup> &Fixups) const { 38 return 0; 39 } 40 virtual unsigned GPR2AlignEncode(const MCInst &MI, unsigned OpNo, 41 SmallVectorImpl<MCFixup> &Fixups) const { 42 return 0; 43 } 44 virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const { 45 return Value; 46 } 47 virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo, 48 SmallVectorImpl<MCFixup> &Fixups) const { 49 return 0; 50 } 51 virtual uint32_t SMRDmemriEncode(const MCInst &MI, unsigned OpNo, 52 SmallVectorImpl<MCFixup> &Fixups) const { 53 return 0; 54 } 55 }; 56 57 } // End namespace llvm 58 59 #endif // AMDGPUCODEEMITTER_H 60
