/external/llvm/lib/Target/Mips/ |
MipsDSPInstrInfo.td | 458 bit isCommutable = 1; 518 DSPRegs, DSPRegs>, IsCommutable, 523 IsCommutable, Defs<[DSPOutFlag20]>; 534 DSPRegs, DSPRegs>, IsCommutable, 539 IsCommutable, Defs<[DSPOutFlag20]>; 551 IsCommutable, Defs<[DSPOutFlag20]>; 558 GPR32, GPR32>, IsCommutable, 563 IsCommutable, Uses<[DSPCarry]>, Defs<[DSPOutFlag20]>; 712 IsCommutable, Defs<[DSPOutFlag21]>; 717 IsCommutable, Defs<[DSPOutFlag21]> [all...] |
MipsInstrInfo.td | 190 class IsCommutable { 191 bit isCommutable = 1; 387 let isCommutable = isComm; 410 let isCommutable = isComm; 418 let isCommutable = 1; 679 let isCommutable = 1; 693 let isCommutable = IsComm; [all...] |
Mips16InstrInfo.td | 461 bit isCommutable = isCom; 829 let isCommutable = 1; 835 let isCommutable = 1; 846 let isCommutable = 1; 857 let isCommutable = 1; [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrFMA.td | 23 let isCommutable = 1 in 39 let isCommutable = 1 in 121 let isCommutable = 1 in 141 let isCommutable = 1 in 203 let isCommutable = 1 in 232 let isCommutable = 1 in 256 let isCommutable = 1 in 276 let isCommutable = 1 in
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X86InstrCMovSetCC.td | 19 isCommutable = 1, SchedRW = [WriteALU] in {
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X86InstrMMX.td | 98 let isCommutable = Commutable; 149 let isCommutable = 0 in 394 let isCommutable = 1 in
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X86InstrArithmetic.td | 153 let isCommutable = 1, SchedRW = [WriteIMul] in { 172 } // isCommutable, SchedRW [all...] |
X86InstrSSE.td | 163 let isCommutable = 1 in { 208 let isCommutable = 1 in 230 let isCommutable = 1, hasSideEffects = 0 in [all...] |
X86InstrAVX512.td | 589 let isCommutable = 1 in { 592 let isCommutable = 0 in [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonInstrInfoV5.td | 129 let isCommutable = 1 in 136 let isCommutable = 1 in 157 let isCommutable = 1 in 164 let isCommutable = 1 in
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/external/llvm/lib/Target/R600/ |
SIInstructions.td | [all...] |
/external/llvm/include/llvm/CodeGen/ |
ScheduleDAG.h | 285 bool isCommutable : 1; // Is a commutable instruction. 316 isTwoAddress(false), isCommutable(false), hasPhysRegUses(false), 330 isTwoAddress(false), isCommutable(false), hasPhysRegUses(false), 343 isTwoAddress(false), isCommutable(false), hasPhysRegUses(false),
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MachineInstr.h | 492 /// isCommutable - Return true if this may be a 2- or 3-address 502 bool isCommutable(QueryType Type = IgnoreBundle) const { [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGSDNodes.cpp | 97 SU->isCommutable = Old->isCommutable; 441 if (MCID.isCommutable()) 442 SU->isCommutable = true; [all...] |
ScheduleDAGFast.cpp | 264 if (MCID.isCommutable()) 265 NewSU->isCommutable = true;
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/external/llvm/lib/Target/ARM/ |
ARMInstrThumb.td | 842 let isCommutable = 1, Uses = [CPSR] in 867 let isCommutable = 1 in 887 let isCommutable = 1 in [all...] |
ARMInstrNEON.td | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430InstrInfo.td | 342 let isCommutable = 1 in { // X = ADD Y, Z == X = ADD Z, Y 430 let isCommutable = 1 in { // X = ADDC Y, Z == X = ADDC Z, Y 441 } // isCommutable 504 let isCommutable = 1 in { // X = AND Y, Z == X = AND Z, Y 588 let isCommutable = 1 in { // X = OR Y, Z == X = OR Z, Y 701 let isCommutable = 1 in { // X = XOR Y, Z == X = XOR Z, Y [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrNEON.td | 53 let isCommutable = Commutable in { 75 let isCommutable = Commutable in { 110 let isCommutable = Commutable in { 132 let isCommutable = Commutable in { 151 let isCommutable = Commutable in { 573 let isCommutable =1 in { [all...] |
/external/llvm/utils/TableGen/ |
CodeGenInstruction.h | 234 bool isCommutable;
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CodeGenInstruction.cpp | 308 isCommutable = R->getValueAsBit("isCommutable");
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/external/llvm/include/llvm/MC/ |
MCInstrDesc.h | 382 /// isCommutable - Return true if this may be a 2- or 3-address 392 bool isCommutable() const {
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/external/llvm/lib/Target/SystemZ/ |
SystemZInstrFP.td | 236 let isCommutable = 1 in { 256 let isCommutable = 1 in {
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SystemZInstrInfo.td | 594 let isCommutable = 1 in { 623 let isCommutable = 1 in { 713 let isCommutable = 1, CCValues = 0xC, CompareZeroCCMask = 0x8 in { [all...] |
/external/llvm/docs/ |
TableGenFundamentals.rst | 94 bit isCommutable = 1; 140 isCommutable = 1, // X = ADD Y,Z --> X = ADD Z,Y
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