| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 10 // This file implements the CCState class, used for lowering and implementing
26 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
42 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
59 void CCState::MarkAllocated(unsigned Reg) {
67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
86 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
100 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
118 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
136 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.h | 30 CCState &State, bool CanFail) {
61 CCState &State) {
73 CCState &State, bool CanFail) {
115 CCState &State) {
125 CCValAssign::LocInfo &LocInfo, CCState &State) {
147 CCState &State) {
158 CCState &State) {
|
| ARMISelLowering.h | 492 int StoreByValRegs(CCState &CCInfo, SelectionDAG &DAG,
501 void VarArgStyleRegisters(CCState &CCInfo, SelectionDAG &DAG,
506 void computeRegArea(CCState &CCInfo, MachineFunction &MF,
517 virtual void HandleByVal(CCState *, unsigned &, unsigned) const;
|
| ARMFastISel.cpp | [all...] |
| ARMISelLowering.cpp | 74 class ARMCCState : public CCState {
79 : CCState(CC, isVarArg, MF, TM, locs, C) {
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 10 // This file declares the CCState and CCValAssign classes, used for lowering
28 class CCState;
137 ISD::ArgFlagsTy ArgFlags, CCState &State);
144 ISD::ArgFlagsTy &ArgFlags, CCState &State);
151 /// CCState - This class holds information needed while lowering arguments and
154 class CCState {
221 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 248 CallingConv::ID CallConv, bool IsO32, CCState &Info,
267 const CCState &getCCInfo() const { return CCInfo; }
320 CCState &CCInfo;
|
| MipsISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 640 CCState &State);
646 CCState &State);
652 CCState &State);
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 54 ISD::ArgFlagsTy ArgFlags, CCState &State);
59 ISD::ArgFlagsTy ArgFlags, CCState &State);
64 ISD::ArgFlagsTy ArgFlags, CCState &State);
69 ISD::ArgFlagsTy ArgFlags, CCState &State);
74 ISD::ArgFlagsTy ArgFlags, CCState &State);
79 ISD::ArgFlagsTy ArgFlags, CCState &State);
84 ISD::ArgFlagsTy ArgFlags, CCState &State) {
133 ISD::ArgFlagsTy ArgFlags, CCState &State) {
171 ISD::ArgFlagsTy ArgFlags, CCState &State) {
189 ISD::ArgFlagsTy ArgFlags, CCState &State)
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.h | 46 void AnalyzeFormalArguments(CCState &State,
|
| AMDGPUISelLowering.cpp | 151 void AMDGPUTargetLowering::AnalyzeFormalArguments(CCState &State,
|
| SIISelLowering.cpp | 186 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
[all...] |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 39 ISD::ArgFlagsTy &ArgFlags, CCState &State)
52 ISD::ArgFlagsTy &ArgFlags, CCState &State)
81 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
120 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
184 // CCState - Info about the registers and stack slot.
185 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
245 // CCState - Info about the registers and stack slot.
246 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(),
344 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
542 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction()
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 175 void SaveVarArgRegisters(CCState &CCInfo, SelectionDAG &DAG, SDLoc DL,
|
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 326 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
421 // CCState - Info about the registers and stack slot.
422 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
472 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
610 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 42 class CCState;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 589 CCState CCInfo(CallConv, IsVarArg, MF, TM, ArgLocs, *DAG.getContext());
713 CCState ArgCCInfo(CallConv, IsVarArg, MF, TM, ArgLocs, *DAG.getContext());
817 CCState RetCCInfo(CallConv, IsVarArg, MF, TM, RetLocs, *DAG.getContext());
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 760 CCState CCInfo(CC, F.isVarArg(), *FuncInfo.MF, TM, ValLocs,
[all...] |
| X86ISelLowering.cpp | [all...] |
