| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-x86_64.pl | 204 ror \$8,%r8 # ror is redundant when $i=0
213 ror \$8,%r8
355 ror \$8,%r8d
374 ror \$8,%r9d
|
| /external/openssl/crypto/rc4/asm/ |
| rc4-x86_64.pl | 204 ror \$8,%r8 # ror is redundant when $i=0
213 ror \$8,%r8
355 ror \$8,%r8d
374 ror \$8,%r9d
|
| /external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/ |
| sha1-586.pl | 423 my $_ror=sub { &ror(@_) };
633 eval(shift(@insns)); # ror
646 eval(shift(@insns)); # ror
657 eval(shift(@insns)); # ror
668 eval(shift(@insns)); # ror
1048 eval(shift(@insns)); # ror
1061 eval(shift(@insns)); # ror
[all...] |
| sha1-x86_64.pl | 304 my $_ror=sub { &ror(@_) };
474 eval(shift(@insns)); # ror
487 eval(shift(@insns)); # ror
498 eval(shift(@insns)); # ror
879 eval(shift(@insns)); # ror
892 eval(shift(@insns)); # ror
902 eval(shift(@insns)); # ror
|
| /external/openssl/crypto/sha/asm/ |
| sha1-586.pl | 423 my $_ror=sub { &ror(@_) };
633 eval(shift(@insns)); # ror
646 eval(shift(@insns)); # ror
657 eval(shift(@insns)); # ror
668 eval(shift(@insns)); # ror
1048 eval(shift(@insns)); # ror
1061 eval(shift(@insns)); # ror
[all...] |
| sha1-x86_64.pl | 304 my $_ror=sub { &ror(@_) };
474 eval(shift(@insns)); # ror
487 eval(shift(@insns)); # ror
498 eval(shift(@insns)); # ror
879 eval(shift(@insns)); # ror
892 eval(shift(@insns)); # ror
902 eval(shift(@insns)); # ror
|
| /external/dropbear/libtomcrypt/src/ciphers/ |
| rc6.c | 196 c = ROR(c - K[1], t) ^ u; \
197 a = ROR(a - K[0], u) ^ t; K -= 2;
|
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.cpp | 269 case A64SE::ROR: O << "ror"; break;
|
| /external/valgrind/main/VEX/priv/ |
| guest_x86_defs.h | 272 rol/ror result zero old_flags
307 * rol/ror -- these only set O and C, and leave A Z C P alone.
|
| /system/core/libcutils/arch-x86/ |
| sse2-memset32-atom.S | 220 ror $8, %eax
224 ror $8, %eax
|
| /external/chromium_org/v8/src/arm/ |
| codegen-arm.cc | 328 __ uxtb16(temp3, Operand(temp1, ROR, 0));
329 __ uxtb16(temp4, Operand(temp1, ROR, 8));
341 __ uxtb(temp3, Operand(temp1, ROR, 8));
343 __ uxtab(temp3, temp3, Operand(temp1, ROR, 0));
|
| constants-arm.h | 255 ROR = 3 << 5, // Rotate right.
257 // RRX is encoded as ROR with shift_imm == 0.
260 // detect it and emit the correct ROR shift operand with shift_imm == 0.
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| omxVCM4P10_PredictIntra_4x4_s.s | 158 UXTB16 tVal6, Above0123, ROR #8 ;// pSrcAbove[1, 3]
197 UXTB16 tVal6, Above0123, ROR #8 ;// pSrcAbove[1, 3]
375 UXTB tVal11, tVal7, ROR #24 ;// tVal11= 00 00 00 L0
386 UXTH tVal11, Out3, ROR #8 ;// tVal11= 00 00 i1 i2
|
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 441 UXTB16 PredVal2,PredVal,ROR #8 ;// PredVal2 = [0d0b]
|
| /bionic/libc/arch-arm/bionic/ |
| strcmp.a15.S | 244 uxtb r3, r2, ror #BYTE1_OFFSET
251 uxtb r3, r2, ror #BYTE2_OFFSET
258 uxtb r3, r2, ror #BYTE3_OFFSET
|
| /bionic/libc/arch-arm/cortex-a9/bionic/ |
| strcmp.S | 219 uxtb r3, r2, ror #BYTE1_OFFSET
226 uxtb r3, r2, ror #BYTE2_OFFSET
233 uxtb r3, r2, ror #BYTE3_OFFSET
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 47 assert (!(ShOpc == ARM_AM::ror && !ShImm) && "Cannot have ror #0");
337 // REG REG 0,SH_OPC - e.g. R5, ROR R3
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/ |
| aesni-sha1-x86_64.pl | 128 my $_ror=sub { &ror(@_) };
356 eval(shift(@insns)); # ror
369 eval(shift(@insns)); # ror
380 eval(shift(@insns)); # ror
867 eval(shift(@insns)); # ror
880 eval(shift(@insns)); # ror
890 eval(shift(@insns)); # ror
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 188 case ARM_AM::ror:
[all...] |
| /external/openssl/crypto/aes/asm/ |
| aesni-sha1-x86_64.pl | 128 my $_ror=sub { &ror(@_) };
356 eval(shift(@insns)); # ror
369 eval(shift(@insns)); # ror
380 eval(shift(@insns)); # ror
867 eval(shift(@insns)); # ror
880 eval(shift(@insns)); # ror
890 eval(shift(@insns)); # ror
|
| /art/compiler/dex/quick/arm/ |
| arm_lir.h | 299 kThumbRorRR, // ror [0100000111] rs[5..3] rd[2..0].
389 kThumb2RorRRR, // ror [111110100110] rn[19..16] [1111] rd[11..8] [0000] rm[3..0].
393 kThumb2RorRRI5, // ror [11101010010011110] imm[14.12] rd[11..8] [11] rm[3..0].
|
| /external/v8/src/arm/ |
| constants-arm.h | 290 ROR = 3 << 5, // Rotate right.
292 // RRX is encoded as ROR with shift_imm == 0.
295 // detect it and emit the correct ROR shift operand with shift_imm == 0.
|
| /dalvik/vm/compiler/codegen/arm/ |
| ArchUtility.cpp | 25 "ror"};
|
| /external/libvpx/libvpx/examples/includes/geshi/geshi/ |
| asm.php | 67 'rcl','rcr','ret','retf','retn','rol','ror','sahf','sal','sar','sbb','scas','scasb','scasw',
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| arm-tests.txt | 321 # CHECK: sxtb r9, r5, ror #8
|
