1 //===-- MipsISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Mips --------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines an instruction selector for the MIPS target. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #define DEBUG_TYPE "mips-isel" 15 #include "MipsISelDAGToDAG.h" 16 #include "Mips16ISelDAGToDAG.h" 17 #include "MipsSEISelDAGToDAG.h" 18 #include "Mips.h" 19 #include "MCTargetDesc/MipsBaseInfo.h" 20 #include "MipsMachineFunction.h" 21 #include "MipsRegisterInfo.h" 22 #include "llvm/CodeGen/MachineConstantPool.h" 23 #include "llvm/CodeGen/MachineFrameInfo.h" 24 #include "llvm/CodeGen/MachineFunction.h" 25 #include "llvm/CodeGen/MachineInstrBuilder.h" 26 #include "llvm/CodeGen/MachineRegisterInfo.h" 27 #include "llvm/CodeGen/SelectionDAGNodes.h" 28 #include "llvm/IR/GlobalValue.h" 29 #include "llvm/IR/Instructions.h" 30 #include "llvm/IR/Intrinsics.h" 31 #include "llvm/IR/Type.h" 32 #include "llvm/Support/CFG.h" 33 #include "llvm/Support/Debug.h" 34 #include "llvm/Support/ErrorHandling.h" 35 #include "llvm/Support/raw_ostream.h" 36 #include "llvm/Target/TargetMachine.h" 37 using namespace llvm; 38 39 //===----------------------------------------------------------------------===// 40 // Instruction Selector Implementation 41 //===----------------------------------------------------------------------===// 42 43 //===----------------------------------------------------------------------===// 44 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine 45 // instructions for SelectionDAG operations. 46 //===----------------------------------------------------------------------===// 47 48 bool MipsDAGToDAGISel::runOnMachineFunction(MachineFunction &MF) { 49 bool Ret = SelectionDAGISel::runOnMachineFunction(MF); 50 51 processFunctionAfterISel(MF); 52 53 return Ret; 54 } 55 56 /// getGlobalBaseReg - Output the instructions required to put the 57 /// GOT address into a register. 58 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() { 59 unsigned GlobalBaseReg = MF->getInfo<MipsFunctionInfo>()->getGlobalBaseReg(); 60 return CurDAG->getRegister(GlobalBaseReg, 61 getTargetLowering()->getPointerTy()).getNode(); 62 } 63 64 /// ComplexPattern used on MipsInstrInfo 65 /// Used on Mips Load/Store instructions 66 bool MipsDAGToDAGISel::selectAddrRegImm(SDValue Addr, SDValue &Base, 67 SDValue &Offset) const { 68 llvm_unreachable("Unimplemented function."); 69 return false; 70 } 71 72 bool MipsDAGToDAGISel::selectAddrDefault(SDValue Addr, SDValue &Base, 73 SDValue &Offset) const { 74 llvm_unreachable("Unimplemented function."); 75 return false; 76 } 77 78 bool MipsDAGToDAGISel::selectIntAddr(SDValue Addr, SDValue &Base, 79 SDValue &Offset) const { 80 llvm_unreachable("Unimplemented function."); 81 return false; 82 } 83 84 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 85 SDValue &Offset, SDValue &Alias) { 86 llvm_unreachable("Unimplemented function."); 87 return false; 88 } 89 90 /// Select instructions not customized! Used for 91 /// expanded, promoted and normal instructions 92 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) { 93 unsigned Opcode = Node->getOpcode(); 94 95 // Dump information about the Node being selected 96 DEBUG(errs() << "Selecting: "; Node->dump(CurDAG); errs() << "\n"); 97 98 // If we have a custom node, we already have selected! 99 if (Node->isMachineOpcode()) { 100 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n"); 101 return NULL; 102 } 103 104 // See if subclasses can handle this node. 105 std::pair<bool, SDNode*> Ret = selectNode(Node); 106 107 if (Ret.first) 108 return Ret.second; 109 110 switch(Opcode) { 111 default: break; 112 113 // Get target GOT address. 114 case ISD::GLOBAL_OFFSET_TABLE: 115 return getGlobalBaseReg(); 116 117 #ifndef NDEBUG 118 case ISD::LOAD: 119 case ISD::STORE: 120 assert(cast<MemSDNode>(Node)->getMemoryVT().getSizeInBits() / 8 <= 121 cast<MemSDNode>(Node)->getAlignment() && 122 "Unexpected unaligned loads/stores."); 123 break; 124 #endif 125 } 126 127 // Select the default instruction 128 SDNode *ResNode = SelectCode(Node); 129 130 DEBUG(errs() << "=> "); 131 if (ResNode == NULL || ResNode == Node) 132 DEBUG(Node->dump(CurDAG)); 133 else 134 DEBUG(ResNode->dump(CurDAG)); 135 DEBUG(errs() << "\n"); 136 return ResNode; 137 } 138 139 bool MipsDAGToDAGISel:: 140 SelectInlineAsmMemoryOperand(const SDValue &Op, char ConstraintCode, 141 std::vector<SDValue> &OutOps) { 142 assert(ConstraintCode == 'm' && "unexpected asm memory constraint"); 143 OutOps.push_back(Op); 144 return false; 145 } 146 147 /// createMipsISelDag - This pass converts a legalized DAG into a 148 /// MIPS-specific DAG, ready for instruction scheduling. 149 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) { 150 if (TM.getSubtargetImpl()->inMips16Mode()) 151 return llvm::createMips16ISelDag(TM); 152 153 return llvm::createMipsSEISelDag(TM); 154 } 155
