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Searched
defs:OpIdx
(Results
1 - 13
of
13
) sorted by null
/external/llvm/include/llvm/Analysis/
ConstantsScanner.h
28
unsigned
OpIdx
; // Operand index
33
assert(!InstI.atEnd() &&
OpIdx
< InstI->getNumOperands() &&
35
return isa<Constant>(InstI->getOperand(
OpIdx
));
39
inline constant_iterator(const Function *F) : InstI(inst_begin(F)),
OpIdx
(0) {
47
: InstI(inst_end(F)),
OpIdx
(0) {
50
inline bool operator==(const _Self& x) const { return
OpIdx
== x.
OpIdx
&&
56
return cast<Constant>(InstI->getOperand(
OpIdx
));
61
++
OpIdx
;
64
while (
OpIdx
< NumOperands && !isAtConstant())
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all
...]
/external/llvm/lib/Target/R600/
R600ExpandSpecialInstrs.cpp
60
int
OpIdx
= TII->getOperandIdx(*OldMI, Op);
61
if (
OpIdx
> -1) {
62
uint64_t Val = OldMI->getOperand(
OpIdx
).getImm();
AMDGPUISelDAGToDAG.cpp
129
unsigned
OpIdx
= Desc.getNumDefs() + OpNo;
130
if (
OpIdx
>= Desc.getNumOperands())
132
int RegClass = Desc.OpInfo[
OpIdx
].RegClass;
/external/llvm/utils/TableGen/
CodeEmitterGen.cpp
95
unsigned
OpIdx
;
96
if (CGI.Operands.hasOperandNamed(VarName,
OpIdx
)) {
98
OpIdx
= CGI.Operands[
OpIdx
].MIOperandNo;
99
assert(!CGI.Operands.isFlatOperandNotEmitted(
OpIdx
) &&
122
OpIdx
= NumberedOp++;
125
std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(
OpIdx
);
136
" op = " + EncoderMethodName + "(MI, " + utostr(
OpIdx
);
143
" op = getMachineOpValue(MI, MI.getOperand(" + utostr(
OpIdx
) + ")";
203
unsigned
OpIdx
;
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all
...]
CodeGenInstruction.cpp
134
unsigned
OpIdx
;
135
if (hasOperandNamed(Name,
OpIdx
)) return
OpIdx
;
141
/// given name. If so, return true and set
OpIdx
to the index of the
143
bool CGIOperandList::hasOperandNamed(StringRef Name, unsigned &
OpIdx
) const {
147
OpIdx
= i;
170
unsigned
OpIdx
= getOperandNamed(OpName);
174
if (OperandList[
OpIdx
].MINumOperands > 1 && !AllowWholeOp &&
180
return std::make_pair(
OpIdx
, 0U);
184
DagInit *MIOpInfo = OperandList[
OpIdx
].MIOperandInfo
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...]
/external/llvm/include/llvm/CodeGen/
ScheduleDAGInstrs.h
46
/// For non-data-dependent uses,
OpIdx
== -1.
49
int
OpIdx
;
52
PhysRegSUOper(SUnit *su, int op, unsigned R): SU(su),
OpIdx
(op), Reg(R) {}
/external/llvm/lib/CodeGen/
ExecutionDepsFix.cpp
196
bool shouldBreakDependence(MachineInstr*, unsigned
OpIdx
, unsigned Pref);
467
bool ExeDepsFix::shouldBreakDependence(MachineInstr *MI, unsigned
OpIdx
,
469
int rx = regIndex(MI->getOperand(
OpIdx
).getReg());
555
unsigned
OpIdx
= UndefReads.back().second;
563
if (!LiveRegSet.contains(UndefMI->getOperand(
OpIdx
).getReg()))
564
TII->breakPartialRegDependency(UndefMI,
OpIdx
, TRI);
571
OpIdx
= UndefReads.back().second;
MachineInstr.cpp
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all
...]
RegisterCoalescer.cpp
655
unsigned
OpIdx
= NewMI->findRegisterUseOperandIdx(IntA.reg, false);
656
NewMI->getOperand(
OpIdx
).setIsKill();
[
all
...]
/external/llvm/lib/ExecutionEngine/RuntimeDyld/
RuntimeDyldChecker.cpp
231
unsigned
OpIdx
= OpIdxExpr.getValue();
232
if (
OpIdx
>= Inst.getNumOperands()) {
235
ErrMsgStream << "Invalid operand index '" << format("%i",
OpIdx
)
242
const MCOperand &Op = Inst.getOperand(
OpIdx
);
246
ErrMsgStream << "Operand '" << format("%i",
OpIdx
)
/external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp
391
unsigned
OpIdx
= 0;
393
bool DstIsDead = MI.getOperand(
OpIdx
).isDead();
394
unsigned DstReg = MI.getOperand(
OpIdx
++).getReg();
406
MIB.addOperand(MI.getOperand(
OpIdx
++));
409
MIB.addOperand(MI.getOperand(
OpIdx
++));
410
MIB.addOperand(MI.getOperand(
OpIdx
++));
413
MIB.addOperand(MI.getOperand(
OpIdx
++));
420
SrcOpIdx =
OpIdx
++;
423
MIB.addOperand(MI.getOperand(
OpIdx
++));
424
MIB.addOperand(MI.getOperand(
OpIdx
++))
[
all
...]
ARMCodeEmitter.cpp
103
unsigned
OpIdx
);
154
unsigned getMachineOpValue(const MachineInstr &MI, unsigned
OpIdx
) const {
155
return getMachineOpValue(MI, MI.getOperand(
OpIdx
));
239
uint32_t getLdStSORegOpValue(const MachineInstr &MI, unsigned
OpIdx
)
267
uint32_t getAddrMode2OffsetOpValue(const MachineInstr &MI, unsigned
OpIdx
)
269
uint32_t getPostIdxRegOpValue(const MachineInstr &MI, unsigned
OpIdx
)
271
uint32_t getAddrMode3OffsetOpValue(const MachineInstr &MI, unsigned
OpIdx
)
347
unsigned encodeVFPRd(const MachineInstr &MI, unsigned
OpIdx
) const;
348
unsigned encodeVFPRn(const MachineInstr &MI, unsigned
OpIdx
) const;
349
unsigned encodeVFPRm(const MachineInstr &MI, unsigned
OpIdx
) const
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...]
ARMBaseInstrInfo.cpp
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...]
Completed in 345 milliseconds