/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600ExpandSpecialInstrs.cpp | 98 unsigned Src1 = 0; 102 Src1 = MI.getOperand(2).getReg(); 107 Src1 = TRI.getSubReg(Src1, SubRegIndex); 112 Src1 = TRI.getSubReg(Src0, SubRegIndex1); 153 .addReg(Src1)
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/external/mesa3d/src/gallium/drivers/radeon/ |
R600ExpandSpecialInstrs.cpp | 98 unsigned Src1 = 0; 102 Src1 = MI.getOperand(2).getReg(); 107 Src1 = TRI.getSubReg(Src1, SubRegIndex); 112 Src1 = TRI.getSubReg(Src0, SubRegIndex1); 153 .addReg(Src1)
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/external/llvm/lib/Target/AArch64/ |
AArch64AdvSIMDScalarPass.cpp | 197 unsigned Src1 = 0, SubReg1; 215 Src1 = getSrcFromCopy(&*Def, MRI, SubReg1); 216 if (Src1) 220 if (Src1 && MRI->hasOneNonDBGUse(OrigSrc1)) 290 unsigned Src1 = 0, SubReg1; 308 Src1 = getSrcFromCopy(&*Def, MRI, SubReg1); 311 if (Src1 && MRI->hasOneNonDBGUse(OrigSrc1)) { 312 assert(Src1 && "Can't delete copy w/o a valid original source!"); 324 if (!Src1) { 326 Src1 = MRI->createVirtualRegister(&AArch64::FPR64RegClass) [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonPeephole.cpp | 160 MachineOperand &Src1 = MI->getOperand(1); 162 if (Src1.getImm() != 0) 177 MachineOperand &Src1 = MI->getOperand(1); 182 unsigned SrcReg = Src1.getReg();
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HexagonISelDAGToDAG.cpp | 731 // def STrid : STInst<(outs), (ins MEMri:$addr, DoubleRegs:$src1), ... [all...] |
/external/llvm/lib/Target/R600/ |
R600ExpandSpecialInstrs.cpp | 108 AMDGPU::ZERO); // src1 224 unsigned Src1 = BMI->getOperand( 225 TII->getOperandIdx(Opcode, AMDGPU::OpName::src1)) 228 (void) Src1; 230 (TRI.getEncodingValue(Src1) & 0xff) < 127) 231 assert(TRI.getHWRegChan(Src0) == TRI.getHWRegChan(Src1)); 275 unsigned Src1 = 0; 279 int Src1Idx = TII->getOperandIdx(MI, AMDGPU::OpName::src1); 281 Src1 = MI.getOperand(Src1Idx).getReg(); 287 Src1 = TRI.getSubReg(Src1, SubRegIndex) [all...] |
SIInstrInfo.cpp | 548 int Src1Idx = AMDGPU::getNamedOperandIdx(Opcode, AMDGPU::OpName::src1); 633 // Verify SRC1 for VOP2 and VOPC 635 const MachineOperand &Src1 = MI->getOperand(Src1Idx); 636 if (Src1.isImm() || Src1.isFPImm()) { 637 ErrInfo = "VOP[2C] src1 cannot be an immediate."; 649 ErrInfo = "VOP3 src1 cannot be a literal constant."; 664 const MachineOperand &Src1 = MI->getOperand(3); 666 if (Src0.isReg() && Src1.isReg() && Src2.isReg()) { 667 if (!compareMachineOp(Src0, Src1) & [all...] |
/external/llvm/lib/Target/X86/ |
X86FixupLEAs.cpp | 141 // if src1 != src2, then convertToThreeAddress will 307 const MachineOperand &Src1 = MI->getOperand(SrcR1 == DstR ? 1 : 3); 311 .addOperand(Src1)
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/external/llvm/lib/Target/AArch64/InstPrinter/ |
AArch64InstPrinter.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |