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Searched
refs:CPUMIPSState
(Results
1 - 7
of
7
) sorted by null
/external/qemu/target-mips/
cpu-qom.h
10
CPUMIPSState
env;
14
static inline MIPSCPU *mips_env_get_cpu(
CPUMIPSState
*env)
op_helper.c
30
static inline void cpu_mips_tlb_flush (
CPUMIPSState
*env, int flush_global);
33
static inline void compute_hflags(
CPUMIPSState
*env)
85
void helper_raise_exception_err (
CPUMIPSState
*env,
97
void helper_raise_exception (
CPUMIPSState
*env, uint32_t exception)
102
void helper_interrupt_restart (
CPUMIPSState
*env)
115
static void do_restore_state (
CPUMIPSState
*env, uintptr_t pc)
128
static inline type do_##name(
CPUMIPSState
*env, target_ulong addr, \
135
static inline type do_##name(
CPUMIPSState
*env, target_ulong addr, \
156
static inline void do_##name(
CPUMIPSState
*env, target_ulong addr, \
163
static inline void do_##name(
CPUMIPSState
*env, target_ulong addr,
[
all
...]
cpu.h
11
#define CPUOldState struct
CPUMIPSState
13
#define CPUArchState struct
CPUMIPSState
28
struct
CPUMIPSState
;
49
int (*map_address) (struct
CPUMIPSState
*env, hwaddr *physical, int *prot, target_ulong address, int rw, int access_type);
50
void (*helper_tlbwi)(struct
CPUMIPSState
*env);
51
void (*helper_tlbwr)(struct
CPUMIPSState
*env);
52
void (*helper_tlbp)(struct
CPUMIPSState
*env);
53
void (*helper_tlbr)(struct
CPUMIPSState
*env);
180
typedef struct
CPUMIPSState
CPUMIPSState
;
[
all
...]
translate.c
564
tcg_gen_ld_i32(t2, cpu_env, offsetof(
CPUMIPSState
, CP0_SRSCtl));
587
tcg_gen_ld_i32(t2, cpu_env, offsetof(
CPUMIPSState
, CP0_SRSCtl));
604
tcg_gen_ld_i32(t, cpu_env, offsetof(
CPUMIPSState
, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
609
tcg_gen_st_i32(t, cpu_env, offsetof(
CPUMIPSState
, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
614
tcg_gen_ld_i32(t, cpu_env, offsetof(
CPUMIPSState
, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
619
tcg_gen_st_i32(t, cpu_env, offsetof(
CPUMIPSState
, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
625
tcg_gen_ld_i64(t, cpu_env, offsetof(
CPUMIPSState
, active_fpu.fpr[reg].d));
640
tcg_gen_st_i64(t, cpu_env, offsetof(
CPUMIPSState
, active_fpu.fpr[reg].d));
780
static inline void restore_cpu_state (
CPUMIPSState
*env, DisasContext *ctx)
878
static inline void check_insn(
CPUMIPSState
*env, DisasContext *ctx, int flags
[
all
...]
helper.c
37
int no_mmu_map_address (
CPUMIPSState
*env, hwaddr *physical, int *prot,
46
int fixed_mmu_map_address (
CPUMIPSState
*env, hwaddr *physical, int *prot,
64
int r4k_map_address (
CPUMIPSState
*env, hwaddr *physical, int *prot,
107
static int get_physical_address (
CPUMIPSState
*env, hwaddr *physical,
209
static void raise_mmu_exception(
CPUMIPSState
*env, target_ulong address,
271
static inline target_ulong cpu_mips_get_pgd(
CPUMIPSState
*env)
343
extern void r4k_helper_ptw_tlbrefill(
CPUMIPSState
*);
345
static inline int cpu_mips_tlb_refill(
CPUMIPSState
*env, target_ulong address, int rw ,
438
int cpu_mips_handle_mmu_fault (
CPUMIPSState
*env, target_ulong address, int rw,
487
hwaddr cpu_mips_translate_address(
CPUMIPSState
*env, target_ulong address, int rw
[
all
...]
translate_init.c
474
static void no_mmu_init (
CPUMIPSState
*env, const mips_def_t *def)
480
static void fixed_mmu_init (
CPUMIPSState
*env, const mips_def_t *def)
486
static void r4k_mmu_init (
CPUMIPSState
*env, const mips_def_t *def)
496
static void mmu_init (
CPUMIPSState
*env, const mips_def_t *def)
519
static void fpu_init (
CPUMIPSState
*env, const mips_def_t *def)
529
static void mvp_init (
CPUMIPSState
*env, const mips_def_t *def)
machine.c
45
CPUMIPSState
*env = opaque;
192
CPUMIPSState
*env = opaque;
Completed in 34 milliseconds