| /external/llvm/lib/CodeGen/ |
| AllocationOrder.cpp | 44 dbgs() << ' ' << PrintReg(Hints[I], TRI);
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| LiveRegMatrix.cpp | 76 DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
77 << " to " << PrintReg(PhysReg, TRI) << ':');
91 DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
92 << " from " << PrintReg(PhysReg, TRI) << ':');
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| RegAllocFast.cpp | 286 DEBUG(dbgs() << "Spilling " << PrintReg(LRI->VirtReg, TRI)
287 << " in " << PrintReg(LR.PhysReg, TRI));
443 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " is already used in instr.\n");
452 DEBUG(dbgs() << PrintReg(VirtReg, TRI) << " corresponding "
453 << PrintReg(PhysReg, TRI) << " is reserved already.\n");
463 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " is disabled.\n");
492 DEBUG(dbgs() << "Assigning " << PrintReg(LR.VirtReg, TRI) << " to "
493 << PrintReg(PhysReg, TRI) << "\n");
547 DEBUG(dbgs() << "Allocating " << PrintReg(VirtReg) << " from "
553 DEBUG(dbgs() << "\tRegister: " << PrintReg(*I, TRI) << "\n")
[all...] |
| LivePhysRegs.cpp | 105 OS << " " << PrintReg(*I, TRI);
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| RegisterCoalescer.cpp | 479 DEBUG(dbgs() << "Extending: " << PrintReg(IntB.reg, TRI));
[all...] |
| MachineRegisterInfo.cpp | 133 errs() << PrintReg(Reg, getTargetRegisterInfo())
141 errs() << PrintReg(Reg, getTargetRegisterInfo())
147 errs() << PrintReg(Reg, getTargetRegisterInfo())
153 errs() << PrintReg(Reg, getTargetRegisterInfo())
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| InlineSpiller.cpp | 322 OS << "spill " << PrintReg(SVI.SpillReg) << ':'
499 DEBUG(dbgs() << "Cached value " << PrintReg(UseReg) << ':'
504 DEBUG(dbgs() << "Tracing value " << PrintReg(UseReg) << ':'
516 DEBUG(dbgs() << " " << PrintReg(Reg) << ':' << VNI->id << '@' << VNI->def
603 DEBUG(dbgs() << "copy of " << PrintReg(SrcReg) << ':'
676 DEBUG(dbgs() << "Value " << PrintReg(Reg) << ':' << VNI->id << '@'
701 DEBUG(dbgs() << "Stale interval: " << PrintReg(SVI.SpillReg) << '\n');
708 DEBUG(dbgs() << "Stale value: " << PrintReg(SVI.SpillReg) << '\n');
[all...] |
| VirtRegMap.cpp | 124 OS << '[' << PrintReg(Reg, TRI) << " -> "
125 << PrintReg(Virt2PhysMap[Reg], TRI) << "] "
133 OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg]
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| LiveIntervalUnion.cpp | 89 << PrintReg(SI.value()->reg, TRI);
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| RegAllocGreedy.cpp | 585 DEBUG(dbgs() << "missed hint " << PrintReg(Hint, TRI) << '\n');
601 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " is available at cost " << Cost
632 << PrintReg(PrevReg, TRI) << " to " << PrintReg(PhysReg, TRI)
766 DEBUG(dbgs() << "evicting " << PrintReg(PhysReg, TRI)
842 DEBUG(dbgs() << PrintReg(PhysReg, TRI) << " would clobber CSR "
843 << PrintReg(CSR, TRI) << '\n');
[all...] |
| RegisterClassInfo.cpp | 143 dbgs() << ' ' << PrintReg(RCI.Order[I], TRI);
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| RegAllocPBQP.cpp | 477 DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> "
487 DEBUG(dbgs() << "VREG " << PrintReg(vreg, tri) << " -> SPILLED (Cost: "
496 DEBUG(dbgs() << PrintReg(li.reg, tri) << " ");
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| TargetRegisterInfo.cpp | 36 void PrintReg::print(raw_ostream &OS) const {
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| PHIElimination.cpp | 258 DEBUG(dbgs() << "Reusing " << PrintReg(IncomingReg) << " for " << *MPhi);
581 DEBUG(dbgs() << PrintReg(Reg) << " live-out before critical edge BB#"
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| ScheduleDAG.cpp | 352 dbgs() << " Reg=" << PrintReg(I->getReg(), G->TRI);
372 dbgs() << " Reg=" << PrintReg(I->getReg(), G->TRI);
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| LiveRangeEdit.cpp | 414 DEBUG(dbgs() << "Inflated " << PrintReg(LI.reg) << " to "
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| MachineVerifier.cpp | [all...] |
| MachineFunction.cpp | 359 OS << PrintReg(I->first, TRI);
361 OS << " in " << PrintReg(I->second, TRI);
[all...] |
| RegisterPressure.cpp | 64 dbgs() << PrintReg(LiveInRegs[i], TRI) << " ";
68 dbgs() << PrintReg(LiveOutRegs[i], TRI) << " ";
[all...] |
| MachineInstr.cpp | 272 OS << PrintReg(getReg(), TRI, getSubReg());
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | [all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 280 DEBUG(dbgs() << PrintReg(FullReg) << "\n");
668 << PrintReg(NewReg) << "\n");
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| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | [all...] |
| AArch64CollectLOH.cpp | 490 DEBUG(dbgs() << "*** Reg " << PrintReg(IdToReg[CurReg], TRI) << " ***\n");
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 436 OS << ' ' << PrintReg(R->getReg(), G ? G->getTarget().getRegisterInfo() :nullptr);
|
