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  /external/kernel-headers/original/uapi/asm-x86/asm/
mtrr.h 91 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
92 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
  /external/oprofile/module/x86/
apic_compat.h 68 static __inline void apic_write(unsigned long reg, unsigned long v)
70 *((volatile u32 *)(APIC_BASE+reg)) = v;
73 static __inline unsigned long apic_read(unsigned long reg)
75 return *((volatile u32 *)(APIC_BASE+reg));
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/sysroot/usr/include/asm/
mtrr.h 83 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
84 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
  /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm/
mtrr.h 83 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
84 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
  /prebuilts/ndk/9/platforms/android-19/arch-x86_64/usr/include/asm/
mtrr.h 79 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
80 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
  /art/compiler/utils/x86/
managed_register_x86.cc 41 RegisterPair reg; // Used to verify that the enum is in sync. member in struct:art::x86::RegisterPairDescriptor
53 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg) {
54 os << X86ManagedRegister::FromRegisterPair(reg);
80 CHECK_EQ(r, kRegisterPairs[r].reg);
89 CHECK_EQ(r, kRegisterPairs[r].reg);
110 std::ostream& operator<<(std::ostream& os, const X86ManagedRegister& reg) {
111 reg.Print(os);
  /art/compiler/utils/x86_64/
managed_register_x86_64.cc 40 RegisterPair reg; // Used to verify that the enum is in sync. member in struct:art::x86_64::RegisterPairDescriptor
52 std::ostream& operator<<(std::ostream& os, const RegisterPair& reg) {
53 os << X86_64ManagedRegister::FromRegisterPair(reg);
79 CHECK_EQ(r, kRegisterPairs[r].reg);
88 CHECK_EQ(r, kRegisterPairs[r].reg);
109 std::ostream& operator<<(std::ostream& os, const X86_64ManagedRegister& reg) {
110 reg.Print(os);
  /external/lldb/source/Plugins/Process/POSIX/
RegisterContextFreeBSD_x86_64.cpp 20 #define UPDATE_GPR_INFO(reg) \
22 GetRegisterContext()[gpr_##reg].byte_size = sizeof(GPR::reg); \
23 GetRegisterContext()[gpr_##reg].byte_offset = GPR_OFFSET(reg); \
26 #define UPDATE_I386_GPR_INFO(i386_reg, reg) \
28 GetRegisterContext()[gpr_##i386_reg].byte_offset = GPR_OFFSET(reg); \
  /art/runtime/arch/arm64/
context_arm64.cc 76 bool Arm64Context::SetGPR(uint32_t reg, uintptr_t value) {
77 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCoreRegisters));
78 DCHECK_NE(gprs_[reg], &gZero); // Can't overwrite this static value since they are never reset.
79 if (gprs_[reg] != nullptr) {
80 *gprs_[reg] = value;
87 bool Arm64Context::SetFPR(uint32_t reg, uintptr_t value) {
88 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfDRegisters));
89 DCHECK_NE(fprs_[reg], &gZero); // Can't overwrite this static value since they are never reset.
90 if (fprs_[reg] != nullptr) {
91 *fprs_[reg] = value
    [all...]
  /art/runtime/arch/x86_64/
context_x86_64.cc 95 bool X86_64Context::SetGPR(uint32_t reg, uintptr_t value) {
96 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
97 CHECK_NE(gprs_[reg], &gZero);
98 if (gprs_[reg] != nullptr) {
99 *gprs_[reg] = value;
106 bool X86_64Context::SetFPR(uint32_t reg, uintptr_t value) {
107 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters));
108 CHECK_NE(fprs_[reg], reinterpret_cast<const uint64_t*>(&gZero));
109 if (fprs_[reg] != nullptr) {
110 *fprs_[reg] = value
    [all...]
  /dalvik/dx/src/com/android/dx/ssa/
PhiTypeResolver.java 69 for (int reg = 0; reg < regCount; reg++) {
70 SsaInsn definsn = ssaMeth.getDefinitionForRegister(reg);
74 worklist.set(reg);
78 int reg; local
79 while ( 0 <= (reg = worklist.nextSetBit(0))) {
80 worklist.clear(reg);
86 PhiInsn definsn = (PhiInsn)ssaMeth.getDefinitionForRegister(reg);
94 List<SsaInsn> useList = ssaMeth.getUseListForRegister(reg);
    [all...]
  /external/chromium_org/v8/test/cctest/
test-code-stubs-ia32.cc 75 Register reg = Register::FromAllocationIndex(reg_num); local
76 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
77 __ push(reg);
93 Register reg = Register::FromAllocationIndex(reg_num); local
94 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
95 __ cmp(reg, MemOperand(esp, 0))
    [all...]
test-code-stubs-x64.cc 79 Register reg = Register::FromAllocationIndex(reg_num); local
80 if (!reg.is(rsp) && !reg.is(rbp) && !reg.is(destination_reg)) {
81 __ pushq(reg);
96 Register reg = Register::FromAllocationIndex(reg_num); local
97 if (!reg.is(rsp) && !reg.is(rbp) && !reg.is(destination_reg)) {
98 __ cmpq(reg, MemOperand(rsp, 0))
    [all...]
test-code-stubs-x87.cc 75 Register reg = Register::FromAllocationIndex(reg_num); local
76 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
77 __ push(reg);
93 Register reg = Register::FromAllocationIndex(reg_num); local
94 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
95 __ cmp(reg, MemOperand(esp, 0))
    [all...]
  /external/dexmaker/src/dx/java/com/android/dx/ssa/
PhiTypeResolver.java 70 for (int reg = 0; reg < regCount; reg++) {
71 SsaInsn definsn = ssaMeth.getDefinitionForRegister(reg);
75 worklist.set(reg);
79 int reg; local
80 while ( 0 <= (reg = worklist.nextSetBit(0))) {
81 worklist.clear(reg);
87 PhiInsn definsn = (PhiInsn)ssaMeth.getDefinitionForRegister(reg);
95 List<SsaInsn> useList = ssaMeth.getUseListForRegister(reg);
    [all...]
  /external/libnfc-nci/src/nfa/sys/
nfa_sys_main.c 86 freebuf = (*nfa_sys_cb.reg[id]->evt_hdlr) (p_msg);
129 nfa_sys_cb.reg[id] = (tNFA_SYS_REG *) p_reg;
175 (*nfa_sys_cb.reg[NFA_ID_DM]->disable) ();
263 if (nfa_sys_cb.reg[id]->enable != NULL)
266 (*nfa_sys_cb.reg[id]->enable) ();
300 if (nfa_sys_cb.reg[id]->disable != NULL)
303 (*nfa_sys_cb.reg[id]->disable) ();
316 (*nfa_sys_cb.reg[NFA_ID_DM]->disable) ();
338 if ((nfa_sys_cb.is_reg[id]) && (nfa_sys_cb.reg[id]->proc_nfcc_pwr_mode))
341 (*nfa_sys_cb.reg[id]->proc_nfcc_pwr_mode) (nfcc_power_mode)
    [all...]
  /external/qemu/tcg/
tcg.c 351 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size)
355 s->frame_reg = reg;
386 static inline int tcg_global_reg_new_internal(TCGType type, int reg,
397 if (tcg_regset_test_reg(s->reserved_regs, reg))
405 ts->reg = reg;
408 tcg_regset_set_reg(s->reserved_regs, reg);
412 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
416 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
420 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name
1751 int reg, k; local
1837 int i, reg; local
2094 int i, k, nb_iargs, nb_oargs, reg; local
2260 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params; local
    [all...]
  /art/runtime/arch/x86/
context_x86.cc 64 bool X86Context::SetGPR(uint32_t reg, uintptr_t value) {
65 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters));
66 CHECK_NE(gprs_[reg], &gZero);
67 if (gprs_[reg] != nullptr) {
68 *gprs_[reg] = value;
  /dalvik/dexgen/src/com/android/dexgen/dex/code/form/
Form31c.java 77 RegisterSpec reg; local
81 reg = regs.get(0);
89 reg = regs.get(0);
90 if (reg.getReg() != regs.get(1).getReg()) {
100 if (!unsignedFitsInByte(reg.getReg())) {
  /hardware/qcom/msm8960/kernel-headers/linux/mfd/
msm-adie-codec.h 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8x74/kernel-headers/linux/mfd/
msm-adie-codec.h 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
  /hardware/qcom/msm8x84/kernel-headers/linux/mfd/
msm-adie-codec.h 39 #define ADIE_CODEC_PACK_ENTRY(reg, mask, val) ((val)|(mask << 8)|(reg << 16))
40 #define ADIE_CODEC_UNPACK_ENTRY(packed, reg, mask, val) do { ((reg) = ((packed >> 16) & (0xff))); ((mask) = ((packed >> 8) & (0xff))); ((val) = ((packed) & (0xff))); } while (0);
61 u8 reg; member in struct:adie_codec_register
  /dalvik/dexgen/src/com/android/dexgen/dex/file/
DebugInfoDecoder.java 56 /** indexed by register, the last local variable live in a reg */
153 public int reg; field in class:DebugInfoDecoder.LocalEntry
164 public LocalEntry(int address, boolean isStart, int reg, int nameIndex,
168 this.reg = reg;
176 address, isStart ? "start" : "end", reg,
294 int reg = readUnsignedLeb128(bs); local
298 address, true, reg, nameIdx, typeIdx, 0);
301 lastEntryForReg[reg] = le;
306 int reg = readUnsignedLeb128(bs) local
319 int reg = readUnsignedLeb128(bs); local
345 int reg = readUnsignedLeb128(bs); local
    [all...]
  /dalvik/dx/src/com/android/dx/dex/file/
DebugInfoDecoder.java 67 /** indexed by register, the last local variable live in a reg */
164 public int reg; field in class:DebugInfoDecoder.LocalEntry
175 public LocalEntry(int address, boolean isStart, int reg, int nameIndex,
179 this.reg = reg;
187 address, isStart ? "start" : "end", reg,
298 int reg = Leb128.readUnsignedLeb128(bs); local
302 address, true, reg, nameIdx, typeIdx, 0);
305 lastEntryForReg[reg] = le;
310 int reg = Leb128.readUnsignedLeb128(bs) local
323 int reg = Leb128.readUnsignedLeb128(bs); local
349 int reg = Leb128.readUnsignedLeb128(bs); local
    [all...]
  /external/dexmaker/src/dx/java/com/android/dx/dex/file/
DebugInfoDecoder.java 57 /** indexed by register, the last local variable live in a reg */
154 public int reg; field in class:DebugInfoDecoder.LocalEntry
165 public LocalEntry(int address, boolean isStart, int reg, int nameIndex,
169 this.reg = reg;
177 address, isStart ? "start" : "end", reg,
288 int reg = Leb128Utils.readUnsignedLeb128(bs); local
292 address, true, reg, nameIdx, typeIdx, 0);
295 lastEntryForReg[reg] = le;
300 int reg = Leb128Utils.readUnsignedLeb128(bs) local
313 int reg = Leb128Utils.readUnsignedLeb128(bs); local
339 int reg = Leb128Utils.readUnsignedLeb128(bs); local
    [all...]

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