| /external/llvm/include/llvm/Support/ |
| YAMLTraits.h | 491 void maskedBitSetCase(T &Val, const char *Str, T ConstVal, T Mask) {
492 if (bitSetMatch(Str, outputting() && (Val & Mask) == ConstVal))
498 uint32_t Mask) {
499 if (bitSetMatch(Str, outputting() && (Val & Mask) == ConstVal))
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 76 int &Mask, int &Value) const override;
|
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 699 unsigned Mask = 1;
701 if (ErrorInfo & Mask) {
703 Msg += getSubtargetFeatureName(ErrorInfo & Mask);
705 Mask <<= 1;
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_cc.c | 210 cc->cc2.depth_write_enable = ctx->Depth.Mask;
|
| /external/mesa3d/src/mesa/drivers/dri/nouveau/ |
| nv10_state_raster.c | 101 PUSH_DATAb(push, ctx->Depth.Mask);
|
| /prebuilts/gcc/linux-x86/host/x86_64-w64-mingw32-4.8/x86_64-w64-mingw32/include/ |
| d3d10shader.h | 93 BYTE Mask;
|
| d3d11shader.h | 131 BYTE Mask;
|
| fltdefs.h | 105 PBYTE Mask;
|
| traffic.h | 73 PVOID Mask;
|
| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| pa-risc2.s | 478 DEPDI,Z -1,32,33,high_mask ; Create Mask 0xffffffff80000000L
505 AND m_0,high_mask,tmp_0 ; m[0] & Mask
506 AND m_1,high_mask,tmp_1 ; m[1] & Mask
512 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m[0]&Mask >> 32-1
513 EXTRD,U tmp_1,32,33,tmp_1 ; tmp_1 = m[1]&Mask >> 32-1
553 AND m_0,high_mask,tmp_0 ; m & Mask
558 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m&Mask >> 32-1
[all...] |
| pa-risc2W.s | 467 DEPDI,Z -1,32,33,high_mask ; Create Mask 0xffffffff80000000L
494 AND m_0,high_mask,tmp_0 ; m[0] & Mask
495 AND m_1,high_mask,tmp_1 ; m[1] & Mask
501 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m[0]&Mask >> 32-1
502 EXTRD,U tmp_1,32,33,tmp_1 ; tmp_1 = m[1]&Mask >> 32-1
542 AND m_0,high_mask,tmp_0 ; m & Mask
547 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m&Mask >> 32-1
1018 AND m,high_mask,temp2 ; m & Mask
1023 EXTRD,U temp2,32,33,temp1 ; temp1 = m&Mask >> 32-1
[all...] |
| /external/openssl/crypto/bn/asm/ |
| pa-risc2.s | 478 DEPDI,Z -1,32,33,high_mask ; Create Mask 0xffffffff80000000L
505 AND m_0,high_mask,tmp_0 ; m[0] & Mask
506 AND m_1,high_mask,tmp_1 ; m[1] & Mask
512 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m[0]&Mask >> 32-1
513 EXTRD,U tmp_1,32,33,tmp_1 ; tmp_1 = m[1]&Mask >> 32-1
553 AND m_0,high_mask,tmp_0 ; m & Mask
558 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m&Mask >> 32-1
[all...] |
| pa-risc2W.s | 467 DEPDI,Z -1,32,33,high_mask ; Create Mask 0xffffffff80000000L
494 AND m_0,high_mask,tmp_0 ; m[0] & Mask
495 AND m_1,high_mask,tmp_1 ; m[1] & Mask
501 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m[0]&Mask >> 32-1
502 EXTRD,U tmp_1,32,33,tmp_1 ; tmp_1 = m[1]&Mask >> 32-1
542 AND m_0,high_mask,tmp_0 ; m & Mask
547 EXTRD,U tmp_0,32,33,tmp_0 ; tmp_0 = m&Mask >> 32-1
1018 AND m,high_mask,temp2 ; m & Mask
1023 EXTRD,U temp2,32,33,temp1 ; temp1 = m&Mask >> 32-1
[all...] |
| /external/llvm/lib/Analysis/ |
| BasicAliasAnalysis.cpp | 495 ModRefResult &Mask) override;
724 ModRefResult &Mask) {
725 Location Loc = AliasAnalysis::getArgLocation(CS, ArgIdx, Mask);
740 Mask = ArgIdx ? Ref : Mod;
794 Mask = ArgIdx ? Ref : Mod;
[all...] |
| /external/llvm/lib/IR/ |
| Attributes.cpp | 503 uint64_t Mask = 0;
515 Mask |= (Log2_32(ASN->getAlignment()) + 1) << 16;
517 Mask |= (Log2_32(ASN->getStackAlignment()) + 1) << 26;
519 Mask |= AttributeImpl::getAttrMask(Kind);
522 return Mask;
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMELFStreamer.cpp | [all...] |
| /external/vixl/src/a64/ |
| debugger-a64.cc | 605 const uint64_t mask = UINT64_C(0xffffffffffffffff) >> (64 - format_size); local
614 data &= mask;
627 const uint64_t mask = UINT64_C(0xffffffffffffffff) >> (64 - format_size); local
639 data &= mask;
648 switch (instr->Mask(ExceptionMask)) {
765 VIXL_ASSERT(instr->Mask(ExceptionMask) == BRK);
775 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
785 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
812 VIXL_ASSERT((instr->Mask(ExceptionMask) == HLT) &&
[all...] |
| /external/clang/lib/CodeGen/ |
| CGExprScalar.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 562 /// Mask are known to be either zero or one and return them in the
610 APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 8);
611 KnownZero |= Mask;
614 APInt Mask = APInt::getHighBitsSet(BitWidth, BitWidth - 16);
615 KnownZero |= Mask;
[all...] |
| AArch64ISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 104 /// isRotateAndMask - Returns true if Mask and Shift can be folded into a
105 /// rotate and mask opcode and mask operation.
106 static bool isRotateAndMask(SDNode *N, unsigned Mask, bool isShiftMask,
357 Val = ~Val; // invert mask
370 bool PPCDAGToDAGISel::isRotateAndMask(SDNode *N, unsigned Mask,
379 unsigned Indeterminant = ~0; // bit mask marking indeterminant results
386 // apply shift left to mask if it comes first
387 if (isShiftMask) Mask = Mask << Shift
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 782 uint64_t Mask,
792 Mask != (0xffu << ScaleLog))
825 uint64_t Mask,
845 SDValue NewMask = DAG.getConstant(Mask >> ShiftAmt, VT);
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| SROA.cpp | [all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineMulDivRem.cpp | [all...] |
