/external/llvm/test/CodeGen/X86/ |
sse3-intrinsics-x86.ll | 37 %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] 40 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone 45 %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] 48 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone
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sse_reload_fold.ll | 20 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) 27 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) 81 %t = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %y, <4 x float> %f) 116 %t = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %y, <2 x double> %f) 132 %t = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %f, <2 x double> %y)
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avx-intrinsics-x86.ll | 796 %res = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1) ; <<2 x double>> [#uses=1] 799 declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone 804 %res = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1) ; <<4 x float>> [#uses=1] 807 declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone [all...] |
/external/llvm/lib/CodeGen/ |
CalcSpillWeights.cpp | 47 unsigned sub, hreg, hsub; local 51 hsub = mi->getOperand(1).getSubReg(); 55 hsub = mi->getOperand(0).getSubReg(); 62 return sub == hsub ? hreg : 0;
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/art/compiler/optimizing/ |
builder.cc | 639 Binop_23x<HSub>(instruction, Primitive::kPrimInt); 644 Binop_23x<HSub>(instruction, Primitive::kPrimLong); 659 Binop_12x<HSub>(instruction, Primitive::kPrimInt); 664 Binop_12x<HSub>(instruction, Primitive::kPrimLong); 674 Binop_22s<HSub>(instruction, true); 684 Binop_22b<HSub>(instruction, true);
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nodes.h | [all...] |
code_generator_arm.cc | 926 void LocationsBuilderARM::VisitSub(HSub* sub) { [all...] |
code_generator_x86_64.cc | 813 void LocationsBuilderX86_64::VisitSub(HSub* sub) { 842 void InstructionCodeGeneratorX86_64::VisitSub(HSub* sub) { [all...] |
code_generator_x86.cc | 878 void LocationsBuilderX86::VisitSub(HSub* sub) { 902 void InstructionCodeGeneratorX86::VisitSub(HSub* sub) { [all...] |
/external/chromium_org/v8/src/ |
hydrogen-bce.cc | 48 HSub* index = HSub::cast(check->index()); 225 // index_raw can be HAdd(index_base, offset), HSub(index_base, offset),
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hydrogen-instructions.cc | [all...] |
hydrogen.cc | [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
lp_bld_quad.c | 134 /* XXX: do hsub version */
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
lp_bld_quad.c | 134 /* XXX: do hsub version */
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/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.td | [all...] |
AArch64RegisterInfo.td | 26 def hsub : SubRegIndex<16>; 280 let SubRegIndices = [hsub] in {
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AArch64InstrInfo.cpp | [all...] |
AArch64ExpandPseudoInsts.cpp | 641 TII->getRegisterInfo().getSubReg(Src.getReg(), AArch64::hsub);
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/external/clang/test/CodeGen/ |
builtins-mips-msa.c | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.h | 202 /// HSUB - Integer horizontal sub. 203 HSUB, [all...] |
X86InstrFragmentsSIMD.td | 60 def X86hsub : SDNode<"X86ISD::HSUB", SDTIntBinOp>;
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/prebuilts/clang/linux-x86/host/3.4/bin/ |
llvm-as | |
llvm-dis | |
llvm-link | |
/prebuilts/clang/linux-x86/host/3.5/bin/ |
llvm-as | |