/external/llvm/include/llvm/CodeGen/ |
RegAllocPBQP.h | 37 /// to a register allocation solution. (i.e. The PBQP-node <--> vreg map, 49 /// and the set of allowed pregs for the vreg. 55 void recordVReg(unsigned vreg, PBQPRAGraph::NodeId nodeId, 58 assert(vreg2Node.find(vreg) == vreg2Node.end() && "Re-mapping vreg."); 59 assert(allowedSets[vreg].empty() && "vreg already has pregs."); 61 node2VReg[nodeId] = vreg; 62 vreg2Node[vreg] = nodeId; 63 std::copy(arBegin, arEnd, std::back_inserter(allowedSets[vreg])); [all...] |
LiveIntervalUnion.h | 119 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): 120 LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false), 135 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { 136 assert(VReg && LIU && "Invalid arguments"); 137 if (UserTag == UTag && VirtReg == VReg && 144 VirtReg = VReg; 162 bool isSeenInterference(LiveInterval *VReg) const; 167 // Did collectInterferingVRegs encounter an unspillable vreg?
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/external/llvm/test/CodeGen/R600/ |
trunc-store-i1.ll | 7 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], [[SREG]] 8 ; SI: BUFFER_STORE_BYTE [[VREG]], 26 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], [[SREG]] 27 ; SI: BUFFER_STORE_BYTE [[VREG]],
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llvm.AMDGPU.bfe.i32.ll | 87 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 88 ; SI: BUFFER_STORE_DWORD [[VREG]], 183 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 184 ; SI: BUFFER_STORE_DWORD [[VREG]], 195 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 196 ; SI: BUFFER_STORE_DWORD [[VREG]], 207 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 208 ; SI: BUFFER_STORE_DWORD [[VREG]], 219 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], -1 220 ; SI: BUFFER_STORE_DWORD [[VREG]], [all...] |
llvm.AMDGPU.bfe.u32.ll | 194 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 195 ; SI: BUFFER_STORE_DWORD [[VREG]], 330 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 331 ; SI: BUFFER_STORE_DWORD [[VREG]], 342 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 343 ; SI: BUFFER_STORE_DWORD [[VREG]], 354 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 0 355 ; SI: BUFFER_STORE_DWORD [[VREG]], 366 ; SI: V_MOV_B32_e32 [[VREG:v[0-9]+]], 1 367 ; SI: BUFFER_STORE_DWORD [[VREG]], [all...] |
llvm.AMDGPU.umax.ll | 25 ; SI: BUFFER_LOAD_UBYTE [[VREG:v[0-9]+]], 26 ; SI: V_MAX_U32_e32 [[RESULT:v[0-9]+]], 0, [[VREG]]
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llvm.AMDGPU.umin.ll | 25 ; SI: BUFFER_LOAD_UBYTE [[VREG:v[0-9]+]], 26 ; SI: V_MIN_U32_e32 [[RESULT:v[0-9]+]], 0, [[VREG]]
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/external/valgrind/main/VEX/priv/ |
host_generic_reg_alloc2.c | 107 vreg. Is safely left at False, and becomes True after a 113 Bound /* in use (holding value of some vreg) */ 116 /* If .disp == Bound, what vreg is it bound to? */ 117 HReg vreg; member in struct:__anon35625 123 (vreg_state) from vreg numbers back to entries in rreg_state. It 125 hregNumber(rreg_state[j].vreg) == i -- that is, the two entries 127 which involve looking for a particular vreg: there is no need to 129 vreg_state. The FAQ "does this vreg already have an associated 132 To indicate, in vreg_state[i], that a given vreg is not currently 165 finding the vreg which is mentioned as far ahead as possible, i 353 HReg rreg, vreg, vregS, vregD; local [all...] |
/art/runtime/ |
stack.h | 43 // The kind of vreg being accessed in calls to Set/GetVReg. 121 // - JNI - just VRegs, but where every VReg holds a reference. 189 const uint32_t* vreg = &vregs_[i]; local 190 return *reinterpret_cast<const int32_t*>(vreg); 196 const uint32_t* vreg = &vregs_[i]; local 197 return *reinterpret_cast<const float*>(vreg); 202 const uint32_t* vreg = &vregs_[i]; local 205 return *reinterpret_cast<unaligned_int64*>(vreg); 210 const uint32_t* vreg = &vregs_[i]; local 213 return *reinterpret_cast<unaligned_double*>(vreg); 239 uint32_t* vreg = &vregs_[i]; local 250 uint32_t* vreg = &vregs_[i]; local 261 uint32_t* vreg = &vregs_[i]; local 275 uint32_t* vreg = &vregs_[i]; local 293 uint32_t* vreg = &vregs_[i]; local [all...] |
stack.cc | 145 bool StackVisitor::GetVReg(mirror::ArtMethod* m, uint16_t vreg, VRegKind kind, 156 if (vmap_table.IsInContext(vreg, kind, &vmap_offset)) { 183 frame_info.FpSpillMask(), frame_info.FrameSizeInBytes(), vreg); 187 *val = cur_shadow_frame_->GetVReg(vreg); 192 bool StackVisitor::GetVRegPair(mirror::ArtMethod* m, uint16_t vreg, VRegKind kind_lo, 210 if (vmap_table.IsInContext(vreg, kind_lo, &vmap_offset_lo) && 211 vmap_table.IsInContext(vreg + 1, kind_hi, &vmap_offset_hi)) { 236 frame_info.FpSpillMask(), frame_info.FrameSizeInBytes(), vreg); 241 *val = cur_shadow_frame_->GetVRegLong(vreg); 246 bool StackVisitor::SetVReg(mirror::ArtMethod* m, uint16_t vreg, uint32_t new_value [all...] |
vmap_table.h | 52 // Is the dex register 'vreg' in the context or on the stack? Should not be called when the 54 bool IsInContext(size_t vreg, VRegKind kind, uint32_t* vmap_offset) const { 65 uint16_t adjusted_vreg = vreg + kEntryAdjustment;
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object_callbacks.h | 64 typedef void (VerifyRootCallback)(const mirror::Object* root, void* arg, size_t vreg,
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/external/llvm/test/CodeGen/PowerPC/ |
quadint-return.ll | 17 ; CHECK: %X3<def> = COPY %vreg 18 ; CHECK-NEXT: %X4<def> = COPY %vreg
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/external/llvm/lib/CodeGen/ |
RegAllocPBQP.cpp | 138 /// \brief Finds the initial set of vreg intervals to allocate. 158 assert(vregItr != node2VReg.end() && "No vreg for node."); 162 PBQPRAGraph::NodeId PBQPRAProblem::getNodeForVReg(unsigned vreg) const { 163 VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg); 164 assert(nodeItr != vreg2Node.end() && "No node for vreg."); 170 PBQPRAProblem::getAllowedSet(unsigned vreg) const { 171 AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg); 172 assert(allowedSetItr != allowedSets.end() && "No pregs for vreg."); 177 unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const { 178 assert(isPRegOption(vreg, option) && "Not a preg option.") 208 unsigned vreg = *vregItr; local 472 unsigned vreg = problem.getVRegForNode(NId); local [all...] |
LiveIntervalUnion.cpp | 150 LiveInterval *VReg = LiveUnionI.value(); 151 if (VReg != RecentReg && !isSeenInterference(VReg)) { 152 RecentReg = VReg; 153 InterferingVRegs.push_back(VReg);
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LiveRangeEdit.cpp | 35 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); 37 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); 39 LiveInterval &LI = LIS.createEmptyInterval(VReg); 44 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); 46 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); 48 return VReg; 398 LiveRangeEdit::MRI_NoteNewVirtualRegister(unsigned VReg) 403 NewRegs.push_back(VReg);
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/external/llvm/test/CodeGen/AArch64/ |
arm64-fast-isel-rem.ll | 8 ; CHECK-SSA: [[QUOTREG:%vreg[0-9]+]]<def> = SDIVWr 10 ; CHECK-SSA: {{%vreg[0-9]+}}<def> = MSUBWrrr [[QUOTREG]]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.cpp | 100 // If the node is only used by a CopyToReg and the dest reg is a vreg, use 101 // the CopyToReg'd destination register instead of creating a new vreg. 217 // is a vreg in the same register class, use the CopyToReg'd destination 218 // register instead of creating a new vreg. 284 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); 287 if (!VReg) { 290 VReg = MRI->createVirtualRegister(RC); 293 TII->get(TargetOpcode::IMPLICIT_DEF), VReg); 294 return VReg; 317 unsigned VReg = getVR(Op, VRBaseMap) [all...] |
/art/compiler/dex/ |
reg_location.h | 26 * Whereas a SSA name describes a definition of a Dalvik vreg, the RegLocation describes 37 * underlying Dalvik vReg will result in a vN_1 name.
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/external/llvm/test/CodeGen/ARM/ |
misched-copy-arm.ll | 36 ; CHECK: %[[R4:vreg[0-9]+]]<def>, %[[R1:vreg[0-9]+]]<def,tied2> = t2LDR_PRE %[[R1]]<tied1> 37 ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R1]] 38 ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R4]]
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/external/llvm/test/CodeGen/X86/ |
early-ifcvt-crash.ll | 11 ; on an inline asm instruction is not a vreg def.
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_wm_debug.c | 45 else if( value - c->vreg >= 0 && 46 value - c->vreg < BRW_WM_MAX_VREG) 47 printf("r%ld", (long) (value - c->vreg));
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_wm_debug.c | 45 else if( value - c->vreg >= 0 && 46 value - c->vreg < BRW_WM_MAX_VREG) 47 printf("r%ld", (long) (value - c->vreg));
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/art/compiler/dex/quick/x86/ |
fp_x86.cc | 217 // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc() 238 // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc() 276 // If result vreg is also src vreg, break association to avoid useless copy by EvalLoc() 301 // If result vreg is also src vreg, break association to avoid useless copy by EvalLoc() 459 // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc( [all...] |
/bionic/libc/arch-arm/bionic/ |
memcpy.a9.S | 112 .macro cpy_line_vfp vreg, base 113 vstr \vreg, [dst, #\base] 114 vldr \vreg, [src, #\base] 121 vstr \vreg, [dst, #\base + 32] 122 vldr \vreg, [src, #\base + prefetch_lines * 64 - 32] 131 .macro cpy_tail_vfp vreg, base 132 vstr \vreg, [dst, #\base] 133 vldr \vreg, [src, #\base] 140 vstr \vreg, [dst, #\base + 32]
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