| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 37 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
49 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
55 MachineBasicBlock &MBB,
58 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
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| PPCInstrInfo.h | 124 void insertNoop(MachineBasicBlock &MBB,
129 bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
133 unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
134 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
143 void insertSelect(MachineBasicBlock &MBB,
149 void copyPhysReg(MachineBasicBlock &MBB,
154 void storeRegToStackSlot(MachineBasicBlock &MBB,
160 void loadRegFromStackSlot(MachineBasicBlock &MBB,
175 bool isProfitableToIfCvt(MachineBasicBlock &MBB,
187 bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB,
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUFrameLowering.h | 41 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
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| SIMachineFunctionInfo.cpp | 59 for (MachineBasicBlock &MBB : *MF) {
60 if (MBB.back().getOpcode() == AMDGPU::S_ENDPGM) {
61 MBB.back().addOperand(*MF, MachineOperand::CreateReg(VGPR, false, true));
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| AMDGPUInstrInfo.cpp | 90 MachineBasicBlock &MBB) const {
91 while (iter != MBB.end()) {
106 AMDGPUInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
116 AMDGPUInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
125 MachineBasicBlock *MBB = MI->getParent();
141 buildMovInstr(MBB, MI, MI->getOperand(DstOpIdx).getReg(),
144 buildIndirectRead(MBB, MI, MI->getOperand(DstOpIdx).getReg(),
156 buildMovInstr(MBB, MI, getIndirectAddrRegClass()->getRegister(Address),
159 buildIndirectWrite(MBB, MI, MI->getOperand(ValOpIdx).getReg(),
167 MBB->erase(MI)
[all...] |
| R600Packetizer.cpp | 166 MachineBasicBlock *MBB) override {
351 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
352 MBB != MBBe; ++MBB) {
353 MachineBasicBlock::iterator End = MBB->end();
354 MachineBasicBlock::iterator MI = MBB->begin();
360 MBB->erase(DeleteMI);
361 End = MBB->end();
369 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
370 MBB != MBBe; ++MBB)
[all...] |
| R600ControlFlowFinalizer.cpp | 315 MakeFetchClause(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I)
322 for (MachineBasicBlock::iterator E = MBB.end(); I != E; ++I) {
335 MachineInstr *MIb = BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead),
371 MachineBasicBlock *MBB = InsertPos->getParent();
375 InsertPos = BuildMI(MBB, InsertPos->getDebugLoc(),
384 MakeALUClause(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I)
389 for (MachineBasicBlock::instr_iterator E = MBB.instr_end(); I != E;) {
420 MachineInstr *MILit = BuildMI(MBB, I, I->getDebugLoc(),
487 MachineBasicBlock &MBB = *MB
[all...] |
| /external/llvm/lib/CodeGen/ |
| MachineCSE.cpp | 37 "Number of cross-MBB physreg referencing CS eliminated");
81 bool PerformTrivialCoalescing(MachineInstr *MI, MachineBasicBlock *MBB);
86 const MachineBasicBlock *MBB,
97 void EnterScope(MachineBasicBlock *MBB);
98 void ExitScope(MachineBasicBlock *MBB);
99 bool ProcessBlock(MachineBasicBlock *MBB);
116 MachineBasicBlock *MBB) {
210 const MachineBasicBlock *MBB,
225 if (!MRI->isConstantPhysReg(Reg, *MBB->getParent()))
249 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end())
[all...] |
| MachineInstrBundle.cpp | 41 MachineBasicBlock *MBB = &*I;
43 for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
44 MIE = MBB->instr_end(); MII != MIE; ) {
100 void llvm::finalizeBundle(MachineBasicBlock &MBB,
104 MIBundleBuilder Bundle(MBB, FirstMI, LastMI);
106 const TargetMachine &TM = MBB.getParent()->getTarget();
110 MachineInstrBuilder MIB = BuildMI(*MBB.getParent(), FirstMI->getDebugLoc(),
208 /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
211 llvm::finalizeBundle(MachineBasicBlock &MBB,
213 MachineBasicBlock::instr_iterator E = MBB.instr_end()
[all...] |
| ExecutionDepsFix.cpp | 347 void ExeDepsFix::enterBasicBlock(MachineBasicBlock *MBB) {
358 // Set up LiveRegs to represent registers entering MBB.
369 if (MBB->pred_empty()) {
370 for (MachineBasicBlock::livein_iterator i = MBB->livein_begin(),
371 e = MBB->livein_end(); i != e; ++i) {
380 DEBUG(dbgs() << "BB#" << MBB->getNumber() << ": entry\n");
385 for (MachineBasicBlock::const_pred_iterator pi = MBB->pred_begin(),
386 pe = MBB->pred_end(); pi != pe; ++pi) {
422 DEBUG(dbgs() << "BB#" << MBB->getNumber()
426 void ExeDepsFix::leaveBasicBlock(MachineBasicBlock *MBB) {
[all...] |
| SplitKit.cpp | 63 const MachineBasicBlock *MBB = MF.getBlockNumbered(Num);
64 const MachineBasicBlock *LPad = MBB->getLandingPadSuccessor();
66 SlotIndex MBBEnd = LIS.getMBBEndIdx(MBB);
71 MachineBasicBlock::const_iterator FirstTerm = MBB->getFirstTerminator();
72 if (FirstTerm == MBB->end())
82 for (MachineBasicBlock::const_iterator I = MBB->end(), E = MBB->begin();
97 // Find the value leaving MBB.
102 // If the value leaving MBB was defined after the call in MBB, it can'
[all...] |
| RegisterScavenging.cpp | 57 if (!MBB)
61 for (MachineBasicBlock::livein_iterator I = MBB->livein_begin(),
62 E = MBB->livein_end(); I != E; ++I)
66 BitVector PR = MBB->getParent()->getFrameInfo()->getPristineRegs(MBB);
71 void RegScavenger::enterBasicBlock(MachineBasicBlock *mbb) {
72 MachineFunction &MF = *mbb->getParent();
87 if (!MBB) {
101 MBB = mbb;
[all...] |
| LiveVariables.cpp | 60 LiveVariables::VarInfo::findKill(const MachineBasicBlock *MBB) const {
62 if (Kills[i]->getParent() == MBB)
94 MachineBasicBlock *MBB,
96 unsigned BBNum = MBB->getNumber();
101 if (VRInfo.Kills[i]->getParent() == MBB) {
106 if (MBB == DefBlock) return; // Terminate recursion
114 assert(MBB != &MF->front() && "Can't find reaching def for virtreg");
115 WorkList.insert(WorkList.end(), MBB->pred_rbegin(), MBB->pred_rend());
120 MachineBasicBlock *MBB) {
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 65 MachineBasicBlock &MBB = *MI.getParent();
70 BuildMI(MBB, II, dl, TII.get(XCore::LDW_2rus), Reg)
76 BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
83 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l2rus), Reg)
98 MachineBasicBlock &MBB = *MI.getParent();
102 TII.loadImmediate(MBB, II, ScratchOffset, Offset);
106 BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
112 BuildMI(MBB, II, dl, TII.get(XCore::STW_l3r))
119 BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
132 MachineBasicBlock &MBB = *MI.getParent()
[all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb2InstrInfo.cpp | 52 MachineBasicBlock *MBB = Tail->getParent();
53 ARMFunctionInfo *AFI = MBB->getParent()->getInfo<ARMFunctionInfo>();
73 MachineBasicBlock::iterator E = MBB->begin();
101 Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB,
105 if (MBBI == MBB.end())
113 void Thumb2InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
119 return ARMBaseInstrInfo::copyPhysReg(MBB, I, DL, DestReg, SrcReg, KillSrc);
121 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
126 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
131 if (I != MBB.end()) DL = I->getDebugLoc()
[all...] |
| MLxExpansionPass.cpp | 68 void ExpandFPMLxInstruction(MachineBasicBlock &MBB, MachineInstr *MI,
71 bool ExpandFPMLxInstructions(MachineBasicBlock &MBB);
94 MachineBasicBlock *MBB = MI->getParent();
97 if (DefMI->getParent() != MBB)
123 MachineBasicBlock *MBB = MI->getParent();
125 if (UseMI->getParent() != MBB)
134 if (UseMI->getParent() != MBB)
142 /// a single-MBB loop.
148 MachineBasicBlock *MBB = MI->getParent();
152 if (DefMI->getParent() != MBB)
[all...] |
| ARMConstantIslandPass.cpp | 312 void computeBlockSize(MachineBasicBlock *MBB);
334 MachineBasicBlock *MBB = MBBI;
335 unsigned MBBId = MBB->getNumber();
569 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
571 MachineFunction::iterator MBBI = MBB;
573 if (std::next(MBBI) == MBB->getParent()->end())
577 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
578 E = MBB->succ_end(); I != E; ++I)
622 MachineBasicBlock &MBB = *MBBI;
624 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end()
[all...] |
| Thumb1RegisterInfo.cpp | 62 Thumb1RegisterInfo::emitLoadConstPool(MachineBasicBlock &MBB,
69 MachineFunction &MF = *MBB.getParent();
73 Type::getInt32Ty(MBB.getParent()->getFunction()->getContext()), Val);
76 BuildMI(MBB, MBBI, dl, TII.get(ARM::tLDRpci))
88 void emitThumbRegPlusImmInReg(MachineBasicBlock &MBB,
96 MachineFunction &MF = *MBB.getParent();
115 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
118 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVi8), LdReg))
120 AddDefaultT1CC(BuildMI(MBB, MBBI, dl, TII.get(ARM::tRSB), LdReg))
123 MRI.emitLoadConstPool(MBB, MBBI, dl, LdReg, 0, NumBytes
[all...] |
| Thumb2ITBlockPass.cpp | 48 bool InsertITInstructions(MachineBasicBlock &MBB);
162 bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) {
167 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
183 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
223 MBB.remove(NMI);
224 MBB.insert(InsertPos, NMI);
246 finalizeBundle(MBB, InsertPos.getInstrIterator(), std::next(LI));
267 MachineBasicBlock &MBB = *MFI;
269 Modified |= InsertITInstructions(MBB);
[all...] |
| Thumb2SizeReduction.cpp | 156 bool ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
159 bool ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI,
164 bool ReduceTo2Addr(MachineBasicBlock &MBB, MachineInstr *MI,
170 bool ReduceToNarrow(MachineBasicBlock &MBB, MachineInstr *MI,
175 bool ReduceMI(MachineBasicBlock &MBB, MachineInstr *MI,
179 bool ReduceMBB(MachineBasicBlock &MBB);
365 Thumb2SizeReduce::ReduceLoadStore(MachineBasicBlock &MBB, MachineInstr *MI,
494 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, TII->get(Opc));
520 MBB.erase_instr(MI);
526 Thumb2SizeReduce::ReduceSpecial(MachineBasicBlock &MBB, MachineInstr *MI
[all...] |
| ARMFrameLowering.cpp | 114 static void emitRegPlusImmediate(bool isARM, MachineBasicBlock &MBB,
122 emitARMRegPlusImmediate(MBB, MBBI, dl, DestReg, SrcReg, NumBytes,
125 emitT2RegPlusImmediate(MBB, MBBI, dl, DestReg, SrcReg, NumBytes,
129 static void emitSPUpdate(bool isARM, MachineBasicBlock &MBB,
135 emitRegPlusImmediate(isARM, MBB, MBBI, dl, TII, ARM::SP, ARM::SP, NumBytes,
158 MachineBasicBlock &MBB = MF.front();
159 MachineBasicBlock::iterator MBBI = MBB.begin();
177 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
194 emitSPUpdate(isARM, MBB, MBBI, dl, TII, -ArgRegsSaveSize,
199 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 57 MachineBasicBlock &MBB = *BB;
58 MachineBasicBlock::iterator I = MBB.begin();
59 while (I != MBB.end()) {
151 BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(Opcode), DstReg)
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64DeadRegisterDefinitionsPass.cpp | 33 bool processMachineBasicBlock(MachineBasicBlock &MBB);
68 MachineBasicBlock &MBB) {
70 for (MachineInstr &MI : MBB) {
126 for (auto &MBB : MF)
127 if (processMachineBasicBlock(MBB))
|
| AArch64ExpandPseudoInsts.cpp | 39 bool expandMBB(MachineBasicBlock &MBB);
40 bool expandMI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI);
41 bool expandMOVImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
88 MachineBasicBlock &MBB,
98 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ORRXri))
108 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi))
139 MachineBasicBlock &MBB,
165 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::ORRXri))
185 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi))
210 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(AArch64::MOVKXi)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ExpandSpecialInstrs.cpp | 57 MachineBasicBlock &MBB = *BB;
58 MachineBasicBlock::iterator I = MBB.begin();
59 while (I != MBB.end()) {
151 BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(Opcode), DstReg)
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