| /external/qemu/target-mips/ |
| translate.c | 69 OPC_BEQ = (0x04 << 26), /* Unconditional if rs = rt = 0 (B) */
224 /* REGIMM (rt field) opcodes */
7638 int rs, rt, rd, sa; local
[all...] |
| /external/android-clat/ |
| netlink_msg.h | 24 struct nl_msg *nlmsg_alloc_rtmsg(uint16_t type, uint16_t flags, struct rtmsg *rt);
|
| /external/compiler-rt/lib/tsan/rtl/ |
| tsan_report.cc | 194 static void PrintThread(const ReportThread *rt) {
196 if (rt->id == 0) // Little sense in describing the main thread.
199 Printf(" Thread T%d", rt->id);
200 if (rt->name && rt->name[0] != '\0')
201 Printf(" '%s'", rt->name);
204 rt->pid, rt->running ? "running" : "finished",
205 thread_name(thrbuf, rt->parent_tid));
206 if (rt->stack
[all...] |
| /frameworks/rs/cpu_ref/linkloader/include/impl/ |
| ELFSectionRelTable.hxx | 60 std::unique_ptr<ELFSectionRelTable> rt(new ELFSectionRelTable());
72 rt->table.push_back(ELFRelocTy::readRel(AR, i));
78 rt->table.push_back(ELFRelocTy::readRela(AR, i));
87 return rt.release();
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_opcode.h | 53 unsigned rt: 5; member in struct:__anon81222::__anon81223
67 unsigned rt: 5; member in struct:__anon81222::__anon81225
86 unsigned rt: 5; member in struct:__anon81222::__anon81227
98 unsigned rt: 5; member in struct:__anon81222::__anon81229
309 * Values for the 'rt' field when 'op' == OP_COPz.
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/svga/ |
| svga_state_rss.c | 91 EMIT_RS( svga, curr->rt[0].writemask, COLORWRITEENABLE, fail );
92 EMIT_RS( svga, curr->rt[0].blend_enable, BLENDENABLE, fail );
94 if (curr->rt[0].blend_enable) {
95 EMIT_RS( svga, curr->rt[0].srcblend, SRCBLEND, fail );
96 EMIT_RS( svga, curr->rt[0].dstblend, DSTBLEND, fail );
97 EMIT_RS( svga, curr->rt[0].blendeq, BLENDEQUATION, fail );
99 EMIT_RS( svga, curr->rt[0].separate_alpha_blend_enable,
102 if (curr->rt[0].separate_alpha_blend_enable) {
103 EMIT_RS( svga, curr->rt[0].srcblend_alpha, SRCBLENDALPHA, fail );
104 EMIT_RS( svga, curr->rt[0].dstblend_alpha, DSTBLENDALPHA, fail )
[all...] |
| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_state_rss.c | 91 EMIT_RS( svga, curr->rt[0].writemask, COLORWRITEENABLE, fail );
92 EMIT_RS( svga, curr->rt[0].blend_enable, BLENDENABLE, fail );
94 if (curr->rt[0].blend_enable) {
95 EMIT_RS( svga, curr->rt[0].srcblend, SRCBLEND, fail );
96 EMIT_RS( svga, curr->rt[0].dstblend, DSTBLEND, fail );
97 EMIT_RS( svga, curr->rt[0].blendeq, BLENDEQUATION, fail );
99 EMIT_RS( svga, curr->rt[0].separate_alpha_blend_enable,
102 if (curr->rt[0].separate_alpha_blend_enable) {
103 EMIT_RS( svga, curr->rt[0].srcblend_alpha, SRCBLENDALPHA, fail );
104 EMIT_RS( svga, curr->rt[0].dstblend_alpha, DSTBLENDALPHA, fail )
[all...] |
| /external/chromium_org/v8/src/arm64/ |
| assembler-arm64.cc | 647 bool result = instr->IsLdrLiteralX() && (instr->Rt() == xzr.code());
688 Emit(LDR_x_lit | ImmLLiteral(size + 1) | Rt(xzr));
705 instr->preceding()->Rt() == xzr.code());
783 void Assembler::cbz(const Register& rt,
786 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt));
790 void Assembler::cbz(const Register& rt,
793 cbz(rt, LinkAndGetInstructionOffsetTo(label));
797 void Assembler::cbnz(const Register& rt,
[all...] |
| /frameworks/av/media/libeffects/downmix/ |
| EffectDownmix.c | 834 int32_t lt, rt, centerPlusLfeContrib; // samples in Q19.12 format local
851 rt = (pSrc[1] << 12) + centerPlusLfeContrib + (pSrc[5] << 12);
854 pDst[1] = clamp16(pDst[1] + (rt >> 13));
867 rt = (pSrc[1] << 12) + centerPlusLfeContrib + (pSrc[5] << 12);
870 pDst[1] = clamp16(rt >> 13); // differs from when accumulate is true above
897 int32_t lt, rt, centerPlusLfeContrib; // samples in Q19.12 format local
1018 int32_t lt, rt, centersLfeContrib; \/\/ samples in Q19.12 format local
[all...] |
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/llvmpipe/ |
| lp_bld_blend.h | 61 unsigned rt,
73 unsigned rt,
|
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_bld_blend.h | 61 unsigned rt,
73 unsigned rt,
|
| /external/proguard/examples/ |
| proguardgui.pro | 18 -libraryjars <java.home>/lib/rt.jar
29 #-libraryjars <java.home>/lib/rt.jar
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| mipsmtregs.h | 159 #define mftc0(rt,sel) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set mips32r2 \n" " .set noat \n" " # mftc0 $1, $" #rt ", " #sel " \n" " .word 0x41000800 | (" #rt " << 16) | " #sel " \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
160 #define mftgpr(rt) ({ unsigned long __res; __asm__ __volatile__( " .set push \n" " .set noat \n" " .set mips32r2 \n" " # mftgpr $1," #rt " \n" " .word 0x41000820 | (" #rt " << 16) \n" " move %0, $1 \n" " .set pop \n" : "=r" (__res)); __res; })
161 #define mftr(rt, u, sel) ({ unsigned long __res; __asm__ __volatile__( " mftr %0, " #rt ", " #u ", " #sel " \n" : "=r" (__res)); __res; })
|
| /prebuilts/tools/common/proguard/proguard4.7/examples/ |
| proguardgui.pro | 17 -libraryjars <java.home>/lib/rt.jar
28 #-libraryjars <java.home>/lib/rt.jar
|
