1 @// 2 @// Copyright (c) 2013 The WebRTC project authors. All Rights Reserved. 3 @// 4 @// Use of this source code is governed by a BSD-style license 5 @// that can be found in the LICENSE file in the root of the source 6 @// tree. An additional intellectual property rights grant can be found 7 @// in the file PATENTS. All contributing project authors may 8 @// be found in the AUTHORS file in the root of the source tree. 9 @// 10 @// This file was originally licensed as follows. It has been 11 @// relicensed with permission from the copyright holders. 12 @// 13 14 @// 15 @// File Name: omxSP_FFTFwd_RToCCS_S16S32_Sfs_s.s 16 @// OpenMAX DL: v1.0.2 17 @// Last Modified Revision: 7403 18 @// Last Modified Date: Mon, 17 Sep 2007 19 @// 20 @// (c) Copyright 2007-2008 ARM Limited. All Rights Reserved. 21 @// 22 @// 23 @// 24 @// Description: 25 @// Compute FFT for a real signal 26 @// 27 28 29 @// Include standard headers 30 31 #include "dl/api/arm/armCOMM_s.h" 32 #include "dl/api/arm/omxtypes_s.h" 33 34 35 @// Import symbols required from other files 36 @// (For example tables) 37 .extern omxSP_FFTFwd_RToCCS_S32_Sfs 38 39 40 @// Set debugging level 41 @//DEBUG_ON SETL {TRUE} 42 43 44 45 @// Guarding implementation by the processor name 46 47 48 49 @// Guarding implementation by the processor name 50 51 @// Import symbols required from other files 52 @// (For example tables) 53 54 55 @//Input Registers 56 57 #define pSrc r0 58 #define pDst r1 59 #define pFFTSpec r2 60 #define scale r3 61 62 @// Output registers 63 #define result r0 64 65 #define pTmpDst r4 66 #define pTmpSrc r5 67 #define N r6 68 #define order r7 69 #define pOut r8 70 71 @// Neon registers 72 73 #define dX0 D0.S16 74 #define qY0 Q1.S32 75 #define dY0S32 D2.S32 76 #define qX0 Q1.S32 77 #define dY1S32 D3.S32 78 #define dX0S32 D0.S32 79 80 81 82 83 @// Allocate stack memory required by the function 84 85 @// Write function header 86 M_START omxSP_FFTFwd_RToCCS_S16S32_Sfs,r11,d15 87 88 @ Structure offsets for the FFTSpec 89 .set ARMsFFTSpec_N, 0 90 .set ARMsFFTSpec_pBitRev, 4 91 .set ARMsFFTSpec_pTwiddle, 8 92 .set ARMsFFTSpec_pBuf, 12 93 94 @// Define stack arguments 95 96 @// Read the size from structure and take log 97 LDR N, [pFFTSpec, #ARMsFFTSpec_N] 98 99 @// Read other structure parameters 100 @//LDR pTwiddle, [pFFTSpec, #ARMsFFTSpec_pTwiddle] 101 LDR pOut, [pFFTSpec, #ARMsFFTSpec_pBuf] 102 103 104 @// N=1 Treat seperately 105 CMP N,#1 106 BGT sizeGreaterThanOne 107 VLD1 dX0[0],[pSrc] 108 VMOVL qY0,dX0 109 VST1 dY0S32[0],[pDst] 110 111 MOV pSrc,pDst 112 B realS32FFT 113 114 sizeGreaterThanOne: 115 MOV N,N,ASR #1 116 117 CLZ order,N @// N = 2^order 118 RSB order,order,#31 119 120 TST order,#1 121 MOVEQ pTmpDst,pOut 122 MOVNE pTmpDst,pDst 123 MOV pTmpSrc,pTmpDst 124 125 CMP N,#1 126 BGT copyS16ToS32 127 VLD1 dX0S32[0],[pSrc] 128 VMOVL qX0,dX0 129 VST1 dY0S32,[pTmpDst] 130 B setpSrc 131 132 133 copyS16ToS32: 134 135 VLD1 dX0,[pSrc]! 136 SUBS N,N,#2 137 VMOVL qX0,dX0 138 VST1 {dY0S32,dY1S32},[pTmpDst]! 139 BGT copyS16ToS32 140 141 setpSrc: 142 MOV pSrc,pTmpSrc 143 144 145 146 realS32FFT: 147 BL omxSP_FFTFwd_RToCCS_S32_Sfs 148 149 150 151 End: 152 @// Set return value 153 MOV result, #OMX_Sts_NoErr 154 155 @// Write function tail 156 M_END 157 .end 158 159
