1 //===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 // 10 // This file contains the pass that transforms the Mips machine instructions 11 // into relocatable machine code. 12 // 13 //===---------------------------------------------------------------------===// 14 15 #include "Mips.h" 16 #include "MCTargetDesc/MipsBaseInfo.h" 17 #include "MipsInstrInfo.h" 18 #include "MipsRelocations.h" 19 #include "MipsSubtarget.h" 20 #include "MipsTargetMachine.h" 21 #include "llvm/ADT/Statistic.h" 22 #include "llvm/CodeGen/JITCodeEmitter.h" 23 #include "llvm/CodeGen/MachineConstantPool.h" 24 #include "llvm/CodeGen/MachineFunctionPass.h" 25 #include "llvm/CodeGen/MachineInstr.h" 26 #include "llvm/CodeGen/MachineInstrBuilder.h" 27 #include "llvm/CodeGen/MachineJumpTableInfo.h" 28 #include "llvm/CodeGen/MachineModuleInfo.h" 29 #include "llvm/CodeGen/MachineOperand.h" 30 #include "llvm/CodeGen/Passes.h" 31 #include "llvm/IR/Constants.h" 32 #include "llvm/IR/DerivedTypes.h" 33 #include "llvm/PassManager.h" 34 #include "llvm/Support/Debug.h" 35 #include "llvm/Support/ErrorHandling.h" 36 #include "llvm/Support/raw_ostream.h" 37 #ifndef NDEBUG 38 #include <iomanip> 39 #endif 40 41 using namespace llvm; 42 43 #define DEBUG_TYPE "jit" 44 45 STATISTIC(NumEmitted, "Number of machine instructions emitted"); 46 47 namespace { 48 49 class MipsCodeEmitter : public MachineFunctionPass { 50 MipsJITInfo *JTI; 51 const MipsInstrInfo *II; 52 const DataLayout *TD; 53 const MipsSubtarget *Subtarget; 54 TargetMachine &TM; 55 JITCodeEmitter &MCE; 56 const std::vector<MachineConstantPoolEntry> *MCPEs; 57 const std::vector<MachineJumpTableEntry> *MJTEs; 58 bool IsPIC; 59 60 void getAnalysisUsage(AnalysisUsage &AU) const override { 61 AU.addRequired<MachineModuleInfo> (); 62 MachineFunctionPass::getAnalysisUsage(AU); 63 } 64 65 static char ID; 66 67 public: 68 MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce) 69 : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr), 70 TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr), 71 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {} 72 73 bool runOnMachineFunction(MachineFunction &MF) override; 74 75 const char *getPassName() const override { 76 return "Mips Machine Code Emitter"; 77 } 78 79 /// getBinaryCodeForInstr - This function, generated by the 80 /// CodeEmitterGenerator using TableGen, produces the binary encoding for 81 /// machine instructions. 82 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const; 83 84 void emitInstruction(MachineBasicBlock::instr_iterator MI, 85 MachineBasicBlock &MBB); 86 87 private: 88 89 void emitWord(unsigned Word); 90 91 /// Routines that handle operands which add machine relocations which are 92 /// fixed up by the relocation stage. 93 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc, 94 bool MayNeedFarStub) const; 95 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const; 96 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const; 97 void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const; 98 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const; 99 100 /// getMachineOpValue - Return binary encoding of operand. If the machine 101 /// operand requires relocation, record the relocation and return zero. 102 unsigned getMachineOpValue(const MachineInstr &MI, 103 const MachineOperand &MO) const; 104 105 unsigned getRelocation(const MachineInstr &MI, 106 const MachineOperand &MO) const; 107 108 unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; 109 unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const; 110 unsigned getBranchTargetOpValueMM(const MachineInstr &MI, 111 unsigned OpNo) const; 112 113 unsigned getBranchTarget21OpValue(const MachineInstr &MI, 114 unsigned OpNo) const; 115 unsigned getBranchTarget26OpValue(const MachineInstr &MI, 116 unsigned OpNo) const; 117 unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const; 118 119 unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const; 120 unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const; 121 unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const; 122 unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const; 123 unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const; 124 unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const; 125 unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const; 126 unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const; 127 unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const; 128 129 /// Expand pseudo instructions with accumulator register operands. 130 void expandACCInstr(MachineBasicBlock::instr_iterator MI, 131 MachineBasicBlock &MBB, unsigned Opc) const; 132 133 /// \brief Expand pseudo instruction. Return true if MI was expanded. 134 bool expandPseudos(MachineBasicBlock::instr_iterator &MI, 135 MachineBasicBlock &MBB) const; 136 }; 137 } 138 139 char MipsCodeEmitter::ID = 0; 140 141 bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) { 142 MipsTargetMachine &Target = static_cast<MipsTargetMachine &>( 143 const_cast<TargetMachine &>(MF.getTarget())); 144 145 JTI = Target.getJITInfo(); 146 II = Target.getInstrInfo(); 147 TD = Target.getDataLayout(); 148 Subtarget = &TM.getSubtarget<MipsSubtarget> (); 149 MCPEs = &MF.getConstantPool()->getConstants(); 150 MJTEs = nullptr; 151 if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables(); 152 JTI->Initialize(MF, IsPIC, Subtarget->isLittle()); 153 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ()); 154 155 do { 156 DEBUG(errs() << "JITTing function '" 157 << MF.getName() << "'\n"); 158 MCE.startFunction(MF); 159 160 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end(); 161 MBB != E; ++MBB){ 162 MCE.StartMachineBasicBlock(MBB); 163 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(), 164 E = MBB->instr_end(); I != E;) 165 emitInstruction(*I++, *MBB); 166 } 167 } while (MCE.finishFunction(MF)); 168 169 return false; 170 } 171 172 unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI, 173 const MachineOperand &MO) const { 174 // NOTE: This relocations are for static. 175 uint64_t TSFlags = MI.getDesc().TSFlags; 176 uint64_t Form = TSFlags & MipsII::FormMask; 177 if (Form == MipsII::FrmJ) 178 return Mips::reloc_mips_26; 179 if ((Form == MipsII::FrmI || Form == MipsII::FrmFI) 180 && MI.isBranch()) 181 return Mips::reloc_mips_pc16; 182 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi) 183 return Mips::reloc_mips_hi; 184 return Mips::reloc_mips_lo; 185 } 186 187 unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI, 188 unsigned OpNo) const { 189 MachineOperand MO = MI.getOperand(OpNo); 190 if (MO.isGlobal()) 191 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true); 192 else if (MO.isSymbol()) 193 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO)); 194 else if (MO.isMBB()) 195 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); 196 else 197 llvm_unreachable("Unexpected jump target operand kind."); 198 return 0; 199 } 200 201 unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI, 202 unsigned OpNo) const { 203 llvm_unreachable("Unimplemented function."); 204 return 0; 205 } 206 207 unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI, 208 unsigned OpNo) const { 209 llvm_unreachable("Unimplemented function."); 210 return 0; 211 } 212 213 unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI, 214 unsigned OpNo) const { 215 llvm_unreachable("Unimplemented function."); 216 return 0; 217 } 218 219 unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI, 220 unsigned OpNo) const { 221 llvm_unreachable("Unimplemented function."); 222 return 0; 223 } 224 225 unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI, 226 unsigned OpNo) const { 227 llvm_unreachable("Unimplemented function."); 228 return 0; 229 } 230 231 unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI, 232 unsigned OpNo) const { 233 MachineOperand MO = MI.getOperand(OpNo); 234 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); 235 return 0; 236 } 237 238 unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI, 239 unsigned OpNo) const { 240 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0. 241 assert(MI.getOperand(OpNo).isReg()); 242 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16; 243 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits; 244 } 245 246 unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI, 247 unsigned OpNo) const { 248 llvm_unreachable("Unimplemented function."); 249 return 0; 250 } 251 252 unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI, 253 unsigned OpNo) const { 254 llvm_unreachable("Unimplemented function."); 255 return 0; 256 } 257 258 unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI, 259 unsigned OpNo) const { 260 // size is encoded as size-1. 261 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; 262 } 263 264 unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI, 265 unsigned OpNo) const { 266 // size is encoded as pos+size-1. 267 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) + 268 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1; 269 } 270 271 unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI, 272 unsigned OpNo) const { 273 llvm_unreachable("Unimplemented function."); 274 return 0; 275 } 276 277 unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI, 278 unsigned OpNo) const { 279 llvm_unreachable("Unimplemented function."); 280 return 0; 281 } 282 283 unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI, 284 unsigned OpNo) const { 285 llvm_unreachable("Unimplemented function."); 286 return 0; 287 } 288 289 /// getMachineOpValue - Return binary encoding of operand. If the machine 290 /// operand requires relocation, record the relocation and return zero. 291 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI, 292 const MachineOperand &MO) const { 293 if (MO.isReg()) 294 return TM.getRegisterInfo()->getEncodingValue(MO.getReg()); 295 else if (MO.isImm()) 296 return static_cast<unsigned>(MO.getImm()); 297 else if (MO.isGlobal()) 298 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true); 299 else if (MO.isSymbol()) 300 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO)); 301 else if (MO.isCPI()) 302 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO)); 303 else if (MO.isJTI()) 304 emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO)); 305 else if (MO.isMBB()) 306 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO)); 307 else 308 llvm_unreachable("Unable to encode MachineOperand!"); 309 return 0; 310 } 311 312 void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc, 313 bool MayNeedFarStub) const { 314 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc, 315 const_cast<GlobalValue *>(GV), 0, 316 MayNeedFarStub)); 317 } 318 319 void MipsCodeEmitter:: 320 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const { 321 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(), 322 Reloc, ES, 0, 0)); 323 } 324 325 void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const { 326 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(), 327 Reloc, CPI, 0, false)); 328 } 329 330 void MipsCodeEmitter:: 331 emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const { 332 MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(), 333 Reloc, JTIndex, 0, false)); 334 } 335 336 void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB, 337 unsigned Reloc) const { 338 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(), 339 Reloc, BB)); 340 } 341 342 void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI, 343 MachineBasicBlock &MBB) { 344 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI); 345 346 // Expand pseudo instruction. Skip if MI was not expanded. 347 if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) && 348 !expandPseudos(MI, MBB)) 349 return; 350 351 MCE.processDebugLoc(MI->getDebugLoc(), true); 352 353 emitWord(getBinaryCodeForInstr(*MI)); 354 ++NumEmitted; // Keep track of the # of mi's emitted 355 356 MCE.processDebugLoc(MI->getDebugLoc(), false); 357 } 358 359 void MipsCodeEmitter::emitWord(unsigned Word) { 360 DEBUG(errs() << " 0x"; 361 errs().write_hex(Word) << "\n"); 362 if (Subtarget->isLittle()) 363 MCE.emitWordLE(Word); 364 else 365 MCE.emitWordBE(Word); 366 } 367 368 void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI, 369 MachineBasicBlock &MBB, 370 unsigned Opc) const { 371 // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1". 372 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc)) 373 .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg()); 374 } 375 376 bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI, 377 MachineBasicBlock &MBB) const { 378 switch (MI->getOpcode()) { 379 case Mips::NOP: 380 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO) 381 .addReg(Mips::ZERO).addImm(0); 382 break; 383 case Mips::B: 384 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO) 385 .addReg(Mips::ZERO).addOperand(MI->getOperand(0)); 386 break; 387 case Mips::TRAP: 388 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0) 389 .addImm(0); 390 break; 391 case Mips::JALRPseudo: 392 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA) 393 .addReg(MI->getOperand(0).getReg()); 394 break; 395 case Mips::PseudoMULT: 396 expandACCInstr(MI, MBB, Mips::MULT); 397 break; 398 case Mips::PseudoMULTu: 399 expandACCInstr(MI, MBB, Mips::MULTu); 400 break; 401 case Mips::PseudoSDIV: 402 expandACCInstr(MI, MBB, Mips::SDIV); 403 break; 404 case Mips::PseudoUDIV: 405 expandACCInstr(MI, MBB, Mips::UDIV); 406 break; 407 case Mips::PseudoMADD: 408 expandACCInstr(MI, MBB, Mips::MADD); 409 break; 410 case Mips::PseudoMADDU: 411 expandACCInstr(MI, MBB, Mips::MADDU); 412 break; 413 case Mips::PseudoMSUB: 414 expandACCInstr(MI, MBB, Mips::MSUB); 415 break; 416 case Mips::PseudoMSUBU: 417 expandACCInstr(MI, MBB, Mips::MSUBU); 418 break; 419 default: 420 return false; 421 } 422 423 (MI--)->eraseFromBundle(); 424 return true; 425 } 426 427 /// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips 428 /// code to the specified MCE object. 429 FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM, 430 JITCodeEmitter &JCE) { 431 return new MipsCodeEmitter(TM, JCE); 432 } 433 434 #include "MipsGenCodeEmitter.inc" 435
