| /art/compiler/dex/quick/x86/ |
| int_x86.cc | 41 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
59 OpRegReg(kOpSub, rs_r0, rs_r2); // r0 = r0 - r2
60 OpRegReg(kOpSbc, rs_r1, rs_r3); // r1 = r1 - r3 - CF
64 OpRegReg(kOpOr, rs_r0, rs_r1); // r0 = high | low - sets ZF
67 OpRegReg(kOpOr, rs_r0, rs_r2); // r0 = r0 | r2
229 OpRegReg(kOpCmp, left_op, right_op);
249 OpRegReg(kOpCmp, left_op, right_op);
323 OpRegReg(kOpXor, rl_result.reg, rl_result.reg);
405 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
420 OpRegReg(kOpSub, rs_r2, rs_r0); // r2 = r2 - r
[all...] |
| call_x86.cc | 117 OpRegReg(kOpAdd, start_of_method_reg, cu_->target64 ? As64BitReg(disp_reg) : disp_reg);
171 OpRegReg(kOpAdd, payload, method_start);
|
| utility_x86.cc | 195 LIR* X86Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {
244 LOG(FATAL) << "Bad case in OpRegReg " << op;
464 return OpRegReg(op, r_dest, r_src2);
467 return OpRegReg(op, r_dest, r_src2);
478 OpRegReg(op, t_reg, r_src2);
493 return OpRegReg(op, r_dest, r_src1);
[all...] |
| target_x86.cc | [all...] |
| codegen_x86.h | 277 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
[all...] |
| /art/compiler/dex/quick/arm/ |
| int_arm.cc | 29 OpRegReg(kOpCmp, src1, src2);
129 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh());
141 OpRegReg(kOpNeg, t_reg, t_reg);
223 OpRegReg(kOpCmp, left_op, right_op); // Same?
328 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh());
359 OpRegReg(kOpCmp, rl_src1.reg.GetLow(), rl_src2.reg.GetLow());
524 OpRegReg(kOpAdd, r_hi, rl_src.reg);
723 OpRegReg(kOpMul, temp, reg2);
742 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
744 OpRegReg(kOpMov, rl_result.reg, rl_src2.reg)
[all...] |
| call_arm.cc | 81 OpRegReg(kOpCmp, r_key, rl_src.reg);
296 OpRegReg(kOpCmp, rs_r1, rs_r2);
|
| codegen_arm.h | 153 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
|
| utility_arm.cc | 371 LIR* ArmMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {
575 OpRegReg(kOpCmp, r_src1, r_tmp);
[all...] |
| /art/compiler/dex/quick/mips/ |
| int_mips.cc | 473 OpRegReg(kOpNeg, rl_result.reg.GetLow(), rl_src.reg.GetLow());
474 OpRegReg(kOpNeg, rl_result.reg.GetHigh(), rl_src.reg.GetHigh());
520 OpRegReg(kOpAdd, reg_ptr, r_new_index);
523 OpRegReg(kOpAdd, reg_ptr, rl_index.reg);
601 OpRegReg(kOpAdd, reg_ptr, r_new_index);
604 OpRegReg(kOpAdd, reg_ptr, rl_index.reg);
|
| codegen_mips.h | 150 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2);
|
| utility_mips.cc | 285 LIR* MipsMir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {
322 LOG(FATAL) << "Bad case in OpRegReg";
|
| /art/compiler/dex/quick/arm64/ |
| int_arm64.cc | 30 OpRegReg(kOpCmp, src1, src2);
56 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
179 OpRegReg(kOpCmp, left_op, right_op);
250 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
653 OpRegReg(kOpXor, rl_result.reg, sign_reg);
666 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg);
769 OpRegReg(kOpCmp, r_tmp, rl_expected.reg);
829 OpRegReg(kOpSub, rs_arr_length, rs_src_pos);
836 OpRegReg(kOpSub, rs_arr_length, rs_dst_pos);
844 OpRegReg(kOpAdd, rs_src, rs_src_pos)
[all...] |
| call_arm64.cc | 81 OpRegReg(kOpCmp, r_key, rl_src.reg);
|
| codegen_arm64.h | 218 LIR* OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) OVERRIDE;
|
| utility_arm64.cc | 669 LIR* Arm64Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {
975 OpRegReg(op, r_dest_src1, r_tmp);
[all...] |
| /art/compiler/dex/quick/ |
| gen_invoke.cc | [all...] |
| gen_common.cc | 344 OpRegReg(op, rl_result.reg, rl_src.reg);
[all...] |
| mir_to_lir.h | [all...] |
