| /art/compiler/dex/quick/mips/ |
| call_mips.cc | 106 OpRegRegReg(kOpAdd, r_end, r_end, r_base);
120 OpRegRegReg(kOpAdd, rs_rRA, rs_rRA, r_disp);
181 OpRegRegReg(kOpSub, r_key, rl_src.reg, r_key);
205 OpRegRegReg(kOpAdd, rs_rRA, rs_rRA, r_disp);
|
| int_mips.cc | 347 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, t_reg);
357 OpRegRegReg(kOpOr, t_reg, reg.GetLow(), reg.GetHigh());
408 OpRegRegReg(kOpAdd, rl_result.reg.GetLow(), rl_src2.reg.GetLow(), rl_src1.reg.GetLow());
410 OpRegRegReg(kOpAdd, t_reg, rl_src2.reg.GetHigh(), rl_src1.reg.GetHigh());
412 OpRegRegReg(kOpAdd, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), t_reg);
432 OpRegRegReg(kOpSub, rl_result.reg.GetLow(), rl_src1.reg.GetLow(), rl_src2.reg.GetLow());
433 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh());
434 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), t_reg);
477 OpRegRegReg(kOpSub, rl_result.reg.GetHigh(), rl_result.reg.GetHigh(), t_reg);
|
| utility_mips.cc | 161 LIR* MipsMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {
196 LOG(FATAL) << "bad case in OpRegRegReg";
302 return OpRegRegReg(op, r_dest_src1, r_dest_src1, r_src2);
|
| codegen_mips.h | 155 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
|
| /art/compiler/dex/quick/arm/ |
| int_arm.cc | 132 OpRegRegReg(kOpSub, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow());
215 OpRegRegReg(kOpSub, rs_dest, left_op, right_op);
544 OpRegRegReg(kOpSub, rl_result.reg, rl_src.reg, tmp1);
714 OpRegRegReg(kOpDiv, rl_result.reg, reg1, reg2);
722 OpRegRegReg(kOpDiv, temp, reg1, reg2);
724 OpRegRegReg(kOpSub, rl_result.reg, reg1, temp);
869 OpRegRegReg(kOpAdd, r_ptr, rl_object.reg, rl_offset.reg);
[all...] |
| utility_arm.cc | 459 LIR* ArmMir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {
725 OpRegRegReg(kOpAdd, reg_ptr, r_base, r_index);
792 OpRegRegReg(kOpAdd, reg_ptr, r_base, r_index);
[all...] |
| codegen_arm.h | 158 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2);
|
| /art/compiler/dex/quick/ |
| gen_common.cc | [all...] |
| gen_invoke.cc | [all...] |
| mir_to_lir.h | [all...] |
| /art/compiler/dex/quick/arm64/ |
| int_arm64.cc | 85 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg));
501 OpRegRegReg(kOpAdd, r_long_mul, rl_src.reg, r_long_mul);
623 OpRegRegReg(kOpDiv, rl_result.reg, r_src1, r_src2);
636 OpRegRegReg(kOpDiv, temp, r_src1, r_src2);
652 OpRegRegReg(kOpAdd, rl_result.reg, rl_src.reg, sign_reg);
736 OpRegRegReg(kOpAdd, r_ptr, rl_object.reg, rl_offset.reg);
[all...] |
| codegen_arm64.h | 223 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
|
| utility_arm64.cc | 801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {
[all...] |
| /art/compiler/dex/quick/x86/ |
| int_x86.cc | 486 OpRegRegReg(kOpOr, t_reg, low_reg, high_reg);
[all...] |
| codegen_x86.h | 282 LIR* OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) OVERRIDE;
[all...] |
| utility_x86.cc | 445 LIR* X86Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1,
491 LOG(FATAL) << "Bad case in OpRegRegReg " << op;
[all...] |
| target_x86.cc | [all...] |
