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      1 //===- CodeGenInstruction.h - Instruction Class Wrapper ---------*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file defines a wrapper class for the 'Instruction' TableGen class.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef CODEGEN_INSTRUCTION_H
     15 #define CODEGEN_INSTRUCTION_H
     16 
     17 #include "llvm/ADT/StringRef.h"
     18 #include "llvm/CodeGen/MachineValueType.h"
     19 #include "llvm/Support/SourceMgr.h"
     20 #include <string>
     21 #include <utility>
     22 #include <vector>
     23 
     24 namespace llvm {
     25   class Record;
     26   class DagInit;
     27   class CodeGenTarget;
     28   class StringRef;
     29 
     30   class CGIOperandList {
     31   public:
     32     class ConstraintInfo {
     33       enum { None, EarlyClobber, Tied } Kind;
     34       unsigned OtherTiedOperand;
     35     public:
     36       ConstraintInfo() : Kind(None) {}
     37 
     38       static ConstraintInfo getEarlyClobber() {
     39         ConstraintInfo I;
     40         I.Kind = EarlyClobber;
     41         I.OtherTiedOperand = 0;
     42         return I;
     43       }
     44 
     45       static ConstraintInfo getTied(unsigned Op) {
     46         ConstraintInfo I;
     47         I.Kind = Tied;
     48         I.OtherTiedOperand = Op;
     49         return I;
     50       }
     51 
     52       bool isNone() const { return Kind == None; }
     53       bool isEarlyClobber() const { return Kind == EarlyClobber; }
     54       bool isTied() const { return Kind == Tied; }
     55 
     56       unsigned getTiedOperand() const {
     57         assert(isTied());
     58         return OtherTiedOperand;
     59       }
     60     };
     61 
     62     /// OperandInfo - The information we keep track of for each operand in the
     63     /// operand list for a tablegen instruction.
     64     struct OperandInfo {
     65       /// Rec - The definition this operand is declared as.
     66       ///
     67       Record *Rec;
     68 
     69       /// Name - If this operand was assigned a symbolic name, this is it,
     70       /// otherwise, it's empty.
     71       std::string Name;
     72 
     73       /// PrinterMethodName - The method used to print operands of this type in
     74       /// the asmprinter.
     75       std::string PrinterMethodName;
     76 
     77       /// EncoderMethodName - The method used to get the machine operand value
     78       /// for binary encoding. "getMachineOpValue" by default.
     79       std::string EncoderMethodName;
     80 
     81       /// OperandType - A value from MCOI::OperandType representing the type of
     82       /// the operand.
     83       std::string OperandType;
     84 
     85       /// MIOperandNo - Currently (this is meant to be phased out), some logical
     86       /// operands correspond to multiple MachineInstr operands.  In the X86
     87       /// target for example, one address operand is represented as 4
     88       /// MachineOperands.  Because of this, the operand number in the
     89       /// OperandList may not match the MachineInstr operand num.  Until it
     90       /// does, this contains the MI operand index of this operand.
     91       unsigned MIOperandNo;
     92       unsigned MINumOperands;   // The number of operands.
     93 
     94       /// DoNotEncode - Bools are set to true in this vector for each operand in
     95       /// the DisableEncoding list.  These should not be emitted by the code
     96       /// emitter.
     97       std::vector<bool> DoNotEncode;
     98 
     99       /// MIOperandInfo - Default MI operand type. Note an operand may be made
    100       /// up of multiple MI operands.
    101       DagInit *MIOperandInfo;
    102 
    103       /// Constraint info for this operand.  This operand can have pieces, so we
    104       /// track constraint info for each.
    105       std::vector<ConstraintInfo> Constraints;
    106 
    107       OperandInfo(Record *R, const std::string &N, const std::string &PMN,
    108                   const std::string &EMN, const std::string &OT, unsigned MION,
    109                   unsigned MINO, DagInit *MIOI)
    110       : Rec(R), Name(N), PrinterMethodName(PMN), EncoderMethodName(EMN),
    111         OperandType(OT), MIOperandNo(MION), MINumOperands(MINO),
    112         MIOperandInfo(MIOI) {}
    113 
    114 
    115       /// getTiedOperand - If this operand is tied to another one, return the
    116       /// other operand number.  Otherwise, return -1.
    117       int getTiedRegister() const {
    118         for (unsigned j = 0, e = Constraints.size(); j != e; ++j) {
    119           const CGIOperandList::ConstraintInfo &CI = Constraints[j];
    120           if (CI.isTied()) return CI.getTiedOperand();
    121         }
    122         return -1;
    123       }
    124     };
    125 
    126     CGIOperandList(Record *D);
    127 
    128     Record *TheDef;            // The actual record containing this OperandList.
    129 
    130     /// NumDefs - Number of def operands declared, this is the number of
    131     /// elements in the instruction's (outs) list.
    132     ///
    133     unsigned NumDefs;
    134 
    135     /// OperandList - The list of declared operands, along with their declared
    136     /// type (which is a record).
    137     std::vector<OperandInfo> OperandList;
    138 
    139     // Information gleaned from the operand list.
    140     bool isPredicable;
    141     bool hasOptionalDef;
    142     bool isVariadic;
    143 
    144     // Provide transparent accessors to the operand list.
    145     bool empty() const { return OperandList.empty(); }
    146     unsigned size() const { return OperandList.size(); }
    147     const OperandInfo &operator[](unsigned i) const { return OperandList[i]; }
    148     OperandInfo &operator[](unsigned i) { return OperandList[i]; }
    149     OperandInfo &back() { return OperandList.back(); }
    150     const OperandInfo &back() const { return OperandList.back(); }
    151 
    152     typedef std::vector<OperandInfo>::iterator iterator;
    153     typedef std::vector<OperandInfo>::const_iterator const_iterator;
    154     iterator begin() { return OperandList.begin(); }
    155     const_iterator begin() const { return OperandList.begin(); }
    156     iterator end() { return OperandList.end(); }
    157     const_iterator end() const { return OperandList.end(); }
    158 
    159     /// getOperandNamed - Return the index of the operand with the specified
    160     /// non-empty name.  If the instruction does not have an operand with the
    161     /// specified name, abort.
    162     unsigned getOperandNamed(StringRef Name) const;
    163 
    164     /// hasOperandNamed - Query whether the instruction has an operand of the
    165     /// given name. If so, return true and set OpIdx to the index of the
    166     /// operand. Otherwise, return false.
    167     bool hasOperandNamed(StringRef Name, unsigned &OpIdx) const;
    168 
    169     /// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
    170     /// where $foo is a whole operand and $foo.bar refers to a suboperand.
    171     /// This aborts if the name is invalid.  If AllowWholeOp is true, references
    172     /// to operands with suboperands are allowed, otherwise not.
    173     std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op,
    174                                                   bool AllowWholeOp = true);
    175 
    176     /// getFlattenedOperandNumber - Flatten a operand/suboperand pair into a
    177     /// flat machineinstr operand #.
    178     unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const {
    179       return OperandList[Op.first].MIOperandNo + Op.second;
    180     }
    181 
    182     /// getSubOperandNumber - Unflatten a operand number into an
    183     /// operand/suboperand pair.
    184     std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const {
    185       for (unsigned i = 0; ; ++i) {
    186         assert(i < OperandList.size() && "Invalid flat operand #");
    187         if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op)
    188           return std::make_pair(i, Op-OperandList[i].MIOperandNo);
    189       }
    190     }
    191 
    192 
    193     /// isFlatOperandNotEmitted - Return true if the specified flat operand #
    194     /// should not be emitted with the code emitter.
    195     bool isFlatOperandNotEmitted(unsigned FlatOpNo) const {
    196       std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo);
    197       if (OperandList[Op.first].DoNotEncode.size() > Op.second)
    198         return OperandList[Op.first].DoNotEncode[Op.second];
    199       return false;
    200     }
    201 
    202     void ProcessDisableEncoding(std::string Value);
    203   };
    204 
    205 
    206   class CodeGenInstruction {
    207   public:
    208     Record *TheDef;            // The actual record defining this instruction.
    209     std::string Namespace;     // The namespace the instruction is in.
    210 
    211     /// AsmString - The format string used to emit a .s file for the
    212     /// instruction.
    213     std::string AsmString;
    214 
    215     /// Operands - This is information about the (ins) and (outs) list specified
    216     /// to the instruction.
    217     CGIOperandList Operands;
    218 
    219     /// ImplicitDefs/ImplicitUses - These are lists of registers that are
    220     /// implicitly defined and used by the instruction.
    221     std::vector<Record*> ImplicitDefs, ImplicitUses;
    222 
    223     // Various boolean values we track for the instruction.
    224     bool isReturn : 1;
    225     bool isBranch : 1;
    226     bool isIndirectBranch : 1;
    227     bool isCompare : 1;
    228     bool isMoveImm : 1;
    229     bool isBitcast : 1;
    230     bool isSelect : 1;
    231     bool isBarrier : 1;
    232     bool isCall : 1;
    233     bool canFoldAsLoad : 1;
    234     bool mayLoad : 1;
    235     bool mayLoad_Unset : 1;
    236     bool mayStore : 1;
    237     bool mayStore_Unset : 1;
    238     bool isPredicable : 1;
    239     bool isConvertibleToThreeAddress : 1;
    240     bool isCommutable : 1;
    241     bool isTerminator : 1;
    242     bool isReMaterializable : 1;
    243     bool hasDelaySlot : 1;
    244     bool usesCustomInserter : 1;
    245     bool hasPostISelHook : 1;
    246     bool hasCtrlDep : 1;
    247     bool isNotDuplicable : 1;
    248     bool hasSideEffects : 1;
    249     bool hasSideEffects_Unset : 1;
    250     bool neverHasSideEffects : 1;
    251     bool isAsCheapAsAMove : 1;
    252     bool hasExtraSrcRegAllocReq : 1;
    253     bool hasExtraDefRegAllocReq : 1;
    254     bool isCodeGenOnly : 1;
    255     bool isPseudo : 1;
    256 
    257     std::string DeprecatedReason;
    258     bool HasComplexDeprecationPredicate;
    259 
    260     /// Are there any undefined flags?
    261     bool hasUndefFlags() const {
    262       return mayLoad_Unset || mayStore_Unset || hasSideEffects_Unset;
    263     }
    264 
    265     // The record used to infer instruction flags, or NULL if no flag values
    266     // have been inferred.
    267     Record *InferredFrom;
    268 
    269     CodeGenInstruction(Record *R);
    270 
    271     /// HasOneImplicitDefWithKnownVT - If the instruction has at least one
    272     /// implicit def and it has a known VT, return the VT, otherwise return
    273     /// MVT::Other.
    274     MVT::SimpleValueType
    275       HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const;
    276 
    277 
    278     /// FlattenAsmStringVariants - Flatten the specified AsmString to only
    279     /// include text from the specified variant, returning the new string.
    280     static std::string FlattenAsmStringVariants(StringRef AsmString,
    281                                                 unsigned Variant);
    282   };
    283 
    284 
    285   /// CodeGenInstAlias - This represents an InstAlias definition.
    286   class CodeGenInstAlias {
    287   public:
    288     Record *TheDef;            // The actual record defining this InstAlias.
    289 
    290     /// AsmString - The format string used to emit a .s file for the
    291     /// instruction.
    292     std::string AsmString;
    293 
    294     /// Result - The result instruction.
    295     DagInit *Result;
    296 
    297     /// ResultInst - The instruction generated by the alias (decoded from
    298     /// Result).
    299     CodeGenInstruction *ResultInst;
    300 
    301 
    302     struct ResultOperand {
    303     private:
    304       std::string Name;
    305       Record *R;
    306 
    307       int64_t Imm;
    308     public:
    309       enum {
    310         K_Record,
    311         K_Imm,
    312         K_Reg
    313       } Kind;
    314 
    315       ResultOperand(std::string N, Record *r) : Name(N), R(r), Kind(K_Record) {}
    316       ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {}
    317       ResultOperand(Record *r) : R(r), Kind(K_Reg) {}
    318 
    319       bool isRecord() const { return Kind == K_Record; }
    320       bool isImm() const { return Kind == K_Imm; }
    321       bool isReg() const { return Kind == K_Reg; }
    322 
    323       StringRef getName() const { assert(isRecord()); return Name; }
    324       Record *getRecord() const { assert(isRecord()); return R; }
    325       int64_t getImm() const { assert(isImm()); return Imm; }
    326       Record *getRegister() const { assert(isReg()); return R; }
    327 
    328       unsigned getMINumOperands() const;
    329     };
    330 
    331     /// ResultOperands - The decoded operands for the result instruction.
    332     std::vector<ResultOperand> ResultOperands;
    333 
    334     /// ResultInstOperandIndex - For each operand, this vector holds a pair of
    335     /// indices to identify the corresponding operand in the result
    336     /// instruction.  The first index specifies the operand and the second
    337     /// index specifies the suboperand.  If there are no suboperands or if all
    338     /// of them are matched by the operand, the second value should be -1.
    339     std::vector<std::pair<unsigned, int> > ResultInstOperandIndex;
    340 
    341     CodeGenInstAlias(Record *R, unsigned Variant, CodeGenTarget &T);
    342 
    343     bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo,
    344                          Record *InstOpRec, bool hasSubOps, ArrayRef<SMLoc> Loc,
    345                          CodeGenTarget &T, ResultOperand &ResOp);
    346   };
    347 }
    348 
    349 #endif
    350