| /cts/libs/vogar-expect/src/vogar/commands/ |
| Rm.java | 22 * A rm command.
24 public final class Rm {
27 new Command("rm", "-f", file.getPath()).execute();
31 new Command("rm", "-rf", directory.getPath()).execute();
|
| /external/chromium_org/tools/telemetry/ |
| cloud_storage | 143 class Rm(command_line.Command):
192 commands = (Ls, Mv, Rm, Upload)
|
| /external/qemu/distrib/sdl-1.2.15/src/video/ |
| SDL_pixels.c | 143 int Rm=0,Gm=0,Bm=0;
152 Rm|=1<<i;
155 fprintf(stderr,"Rw=%d Rm=0x%02X\n",Rw,Rm);
189 r=(r<<format->Rloss)|((r*Rm)>>Rw);
|
| /external/chromium_org/v8/src/arm/ |
| disasm-arm.cc | 91 void FormatNeonMemory(int Rn, int align, int Rm);
194 int rm = instr->RmValue(); local
196 PrintRegister(rm);
199 // Special case for using rm only.
315 } else if (format[1] == 'm') { // 'rm: Rm register
416 void Decoder::FormatNeonMemory(int Rn, int align, int Rm) {
423 if (Rm == 15) {
425 } else if (Rm == 13) {
429 "], r%d", Rm);
[all...] |
| simulator-arm.cc | 2010 int rm = instr->RmValue(); local
2090 int rm = instr->RmValue(); local
2218 int rm = instr->RmValue(); local
2239 int rm = instr->RmValue(); local
2718 int rm = instr->RmValue(); local
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | [all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | [all...] |
| /art/disassembler/ |
| disassembler_arm.cc | 148 struct Rm {
149 explicit Rm(uint32_t instruction) : shift((instruction >> 4) & 0xff), rm(instruction & 0xf) {}
151 ArmRegister rm; member in struct:art::arm::Rm
153 std::ostream& operator<<(std::ostream& os, const Rm& r) {
154 os << r.rm;
274 // Show only Rd and Rm.
640 // |111|0101| op3|S| Rn |imm3| Rd |i2|ty| Rm |
649 ArmRegister Rm(instr, 0);
733 args << Rm;
1487 args << Rt << ", [" << Rn << ", " << rm; local
1704 args << rdn << ", " << rm; local
1717 args << DN_Rdn << ", " << rm; local
1728 args << DN_Rdn << ", " << rm; local
1738 args << N_Rn << ", " << rm; local
1746 args << rm; local
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| Arm64Assembler.cpp | 376 uint32_t Rm;
382 Rm = mAddrMode.reg_imm_Rm;
388 Rm = Op2;
398 case opADD: *mPC++ = A64_ADD_W(Rd, Rn, Rm, shift, amount); break;
399 case opAND: *mPC++ = A64_AND_W(Rd, Rn, Rm, shift, amount); break;
400 case opORR: *mPC++ = A64_ORR_W(Rd, Rn, Rm, shift, amount); break;
401 case opMVN: *mPC++ = A64_ORN_W(Rd, Rn, Rm, shift, amount); break;
402 case opSUB: *mPC++ = A64_SUB_W(Rd, Rn, Rm, shift, amount, s);break;
472 int Rm = mAddrMode.reg_imm_Rm;
474 *mPC++ = A64_ADD_X_Wm_SXTW(Rd, Rn, Rm, amount)
[all...] |
| /system/core/libpixelflinger/tests/arch-arm64/assembler/ |
| arm64_assembler_test.cpp | 415 uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3)
440 op2 = Rm;
441 regs[Rm] = test.RmValue;
445 op2 = a64asm->reg_imm(Rm, test.shiftMode, test.shiftAmount);
446 regs[Rm] = test.RmValue;
456 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break;
457 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break;
461 case INSTR_SMULBB:a64asm->SMULBB(test.cond, Rd,Rm,Rs); break;
462 case INSTR_SMULBT:a64asm->SMULBT(test.cond, Rd,Rm,Rs); break;
463 case INSTR_SMULTB:a64asm->SMULTB(test.cond, Rd,Rm,Rs); break
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | [all...] |
| /external/qemu/disas/ |
| arm.c | 2074 const char *rm = arm_regnames [given & 0xf]; local
2289 int rm = ((given >> 0) & 0xf); local
2319 int rm = ((given >> 0) & 0xf); local
2394 int rm = ((given >> 0) & 0xf); local
[all...] |
| i386.c | 349 #define Rm { OP_R, m_mode }
1588 int rm; member in struct:__anon12946
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.cpp | [all...] |
| /external/lldb/source/Plugins/Instruction/ARM/ |
| EmulateInstructionARM.cpp | 739 uint32_t Rm; // the source register
745 Rm = Bits32(opcode, 6, 3);
752 Rm = Bits32(opcode, 5, 3);
759 Rm = Bits32(opcode, 3, 0);
762 if (setflags && (BadReg(Rd) || BadReg(Rm)))
765 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13)))
770 Rm = Bits32(opcode, 3, 0);
780 uint32_t result = ReadCoreReg(Rm, &success);
784 // The context specifies that Rm is to be moved into Rd
[all...] |
| /external/chromium_org/third_party/dom_distiller_js/package/js/ |
| domdistiller.js | 196 function rm(a){return new lm(a.c,a.b,a.d,a.f,a.e)}
434 function Qm(a,b){var c;c=Sm(a,b);co(a.s,b.tagName)&&(c=ti(go(a.s,b.tagName),21));c?(a.f=c.R(a)|a.f):(a.f=true);(!c||c.Q())&&--a.t;a.f&&Rm(a);Ut(a.o)}
[all...] |
