| /external/llvm/lib/MC/ |
| MCAsmBackend.cpp | 26 { "FK_PCRel_1", 0, 8, MCFixupKindInfo::FKF_IsPCRel },
27 { "FK_PCRel_2", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
28 { "FK_PCRel_4", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
29 { "FK_PCRel_8", 0, 64, MCFixupKindInfo::FKF_IsPCRel },
|
| MCAssembler.cpp | 461 Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel;
846 MCFixupKindInfo::FKF_IsPCRel;
[all...] |
| MachObjectWriter.cpp | 66 return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
[all...] |
| ELFObjectWriter.cpp | 398 return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCFixupKindInfo.h | 20 FKF_IsPCRel = (1 << 0),
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsAsmBackend.cpp | 239 { "fixup_Mips_PC16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
252 { "fixup_Mips_Branch_PCRel", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
264 { "fixup_Mips_PC18_S3", 0, 18, MCFixupKindInfo::FKF_IsPCRel },
265 { "fixup_MIPS_PC19_S2", 0, 19, MCFixupKindInfo::FKF_IsPCRel },
266 { "fixup_MIPS_PC21_S2", 0, 21, MCFixupKindInfo::FKF_IsPCRel },
267 { "fixup_MIPS_PC26_S2", 0, 26, MCFixupKindInfo::FKF_IsPCRel },
268 { "fixup_MIPS_PCHI16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
269 { "fixup_MIPS_PCLO16", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
274 { "fixup_MICROMIPS_PC16_S1", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
302 { "fixup_Mips_PC16", 16, 16, MCFixupKindInfo::FKF_IsPCRel },
[all...] |
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAsmBackend.cpp | 69 { "fixup_arm_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
70 { "fixup_t2_ldst_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel |
72 { "fixup_arm_pcrel_10_unscaled", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
73 { "fixup_arm_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
74 { "fixup_t2_pcrel_10", 0, 32, MCFixupKindInfo::FKF_IsPCRel |
76 { "fixup_thumb_adr_pcrel_10",0, 8, MCFixupKindInfo::FKF_IsPCRel |
78 { "fixup_arm_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
79 { "fixup_t2_adr_pcrel_12", 0, 32, MCFixupKindInfo::FKF_IsPCRel |
81 { "fixup_arm_condbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel },
82 { "fixup_arm_uncondbranch", 0, 24, MCFixupKindInfo::FKF_IsPCRel },
[all...] |
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCAsmBackend.cpp | 73 { "FK_390_PC16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
74 { "FK_390_PC32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel },
75 { "FK_390_PLT16DBL", 0, 16, MCFixupKindInfo::FKF_IsPCRel },
76 { "FK_390_PLT32DBL", 0, 32, MCFixupKindInfo::FKF_IsPCRel }
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcAsmBackend.cpp | 112 { "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
113 { "fixup_sparc_br22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
114 { "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
115 { "fixup_sparc_br16_2", 10, 2, MCFixupKindInfo::FKF_IsPCRel },
116 { "fixup_sparc_br16_14", 18, 14, MCFixupKindInfo::FKF_IsPCRel },
124 { "fixup_sparc_pc22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
125 { "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel },
128 { "fixup_sparc_wplt30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCAsmBackend.cpp | 87 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
88 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
97 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel },
98 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel },
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 28 MCFixupKindInfo::FKF_IsAlignedDownTo32Bits | MCFixupKindInfo::FKF_IsPCRel;
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86AsmBackend.cpp | 95 { "reloc_riprel_4byte", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel },
96 { "reloc_riprel_4byte_movq_load", 0, 4 * 8, MCFixupKindInfo::FKF_IsPCRel},
|
