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  /external/compiler-rt/test/asan/TestCases/Linux/
asan_dlopen_test.cc 11 dlopen(RT, RTLD_LAZY);
  /external/valgrind/main/none/tests/mips64/
macro_int.h 1 #define TEST1(instruction, RSval, RTval, RD, RS, RT) \
6 "move $"#RT", %2" "\n\t" \
12 : #RD, #RS, #RT \
14 printf("%s :: rd 0x%llx, rs 0x%llx, rt 0x%llx\n", \
19 #define TEST2(instruction, RSval, imm, RT, RS) \
24 "move $"#RT", $zero" "\n\t" \
26 "move %0, $"#RT "\n\t" \
29 : #RT, #RS \
31 printf("%s :: rt 0x%llx, rs 0x%llx, imm 0x%04x\n", \
51 #define TEST4(instruction, RSval, RTval, RS, RT) \
    [all...]
cvm_ins.c 70 #define TESTINST1(instruction, RSVal, RT, RS, p, lenm1) \
74 "li $" #RT ", 0" "\n\t" \
77 "move %0, $" #RT "\n\t" \
80 : #RS, #RT, "cc", "memory" \
82 printf("%s :: rt 0x%lx rs 0x%x, p 0x%08x, lenm1 0x%08x\n", \
85 #define TESTINST2(instruction, RSVal, RTval, RD, RS, RT) \
91 "move $" #RT ", %2" "\n\t" \
96 : #RD, #RS, #RT, "cc", "memory" \
98 printf("%s :: rd 0x%lx rs 0x%x, rt 0x%x\n", \
101 #define TESTINST3(instruction, RSVal, RT, RS,imm)
    [all...]
move_instructions.c 138 /* movX.s fd, fs, rt */
139 #define TEST4(instruction, offset, RTval, FD, FS, RT) \
143 "move $"#RT", %2" "\n\t" \
152 : "t0", #RT, "$"#FD, "$"#FS \
157 /* movX.d fd, fs, rt */
158 #define TEST4d(instruction, offset, RTval, FD, FS, RT) \
162 "move $"#RT", %2" "\n\t" \
171 : #RT, "t0", "$"#FD, "$"#FS \
  /frameworks/native/include/ui/
TVecHelpers.h 122 template<typename RT>
124 BASE<T> PURE operator +(const BASE<T>& lv, const BASE<RT>& rv) {
127 template<typename RT>
129 BASE<T> PURE operator -(const BASE<T>& lv, const BASE<RT>& rv) {
203 template<typename RT>
205 BASE<T> PURE operator *(const BASE<T>& lv, const BASE<RT>& rv) {
208 template<typename RT>
210 BASE<T> PURE operator /(const BASE<T>& lv, const BASE<RT>& rv) {
285 template<typename RT>
287 bool PURE operator ==(const BASE<T>& lv, const BASE<RT>& rv)
    [all...]
  /external/smack/src/org/xbill/DNS/
RTRecord.java 23 * Creates an RT Record from the given data
32 super(name, Type.RT, dclass, ttl, preference, "preference",
  /external/qemu/disas/
ppc.c 704 equal the RT field. */
735 instruction or the RT field in a D, DS, X, XFX or XO form
738 #define RT RS
742 /* The RS and RT fields of the DS form stq instruction, which have
    [all...]
  /external/clang/lib/StaticAnalyzer/Checkers/
ReturnUndefChecker.cpp 47 QualType RT = CallEvent::getDeclaredResultType(SFC->getDecl());
58 if (!RT.isNull() && RT->isVoidType())
64 if (RT.isNull() && isa<BlockDecl>(SFC->getDecl()) &&
72 if (RT.isNull())
75 if (RT->isReferenceType()) {
CastSizeChecker.cpp 51 const RecordType *RT = ToPointeeTy->getAs<RecordType>();
52 if (!RT)
55 const RecordDecl *RD = RT->getDecl();
  /external/emma/core/java12/com/vladium/emma/rt/
RT.java 7 * $Id: RT.java,v 1.2.2.3 2004/07/16 23:32:03 vlad_r Exp $
9 package com.vladium.emma.rt;
27 abstract class RT implements IAppConstants
39 ClassLoader loader = RT.class.getClassLoader ();
84 final Runnable exitHook = new RTExitHook (RT.class, cdata, getCoverageOutFile (), getCoverageOutMerge ());
89 // the RT classloader is some component loader (e.g, in a J2EE container)
123 // issues of class name collisions and class reloading) or RT.class
124 // (to prevent RT reloading)]
150 if (DEBUG) System.out.println ("RT::dumpCoverageData() DUMPING " + RT.class.getClassLoader ())
    [all...]
RTExitHook.java 9 package com.vladium.emma.rt;
105 RTExitHook (final Class RT, final ICoverageData cdata, final File outFile, final boolean merge)
107 m_RT = RT;
120 private Class m_RT; // keep our RT class pinned in memory
  /external/llvm/tools/lli/ChildTarget/
ChildTarget.cpp 19 RemoteTarget *RT;
49 ThisChild.RT = new RemoteTarget();
57 delete ThisChild.RT;
89 RT->stop();
116 RT->allocateSpace(AllocSize, Alignment, Addr);
135 if (!RT->isAllocatedMemory(Addr, BufferSize))
166 RT->executeCode(Addr, Result);
  /libcore/luni/src/main/java/java/util/
MapEntry.java 28 interface Type<RT, KT, VT> {
29 RT get(MapEntry<KT, VT> entry);
  /external/valgrind/main/memcheck/tests/ppc32/
power_ISA2_05.c 171 int RT;
181 __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
182 printf("lwarx => %x\n", RT);
187 __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
188 printf("ldarx => %x\n", RT);
  /external/valgrind/main/memcheck/tests/ppc64/
power_ISA2_05.c 170 int RT;
180 __asm__ volatile ("lwarx %0, 20, 21, 1":"=r" (RT));
181 printf("lwarx => %x\n", RT);
186 __asm__ volatile ("ldarx %0, 20, 21, 1":"=r" (RT));
187 printf("ldarx => %x\n", RT);
  /ndk/tests/device/issue42891-boost-1_52/jni/boost/boost/math/special_functions/
math_fwd.hpp 16 // RT = Real type (built-in floating-point types, float, double, long double) & User Defined Types
149 template <class RT> // Error function.
150 typename tools::promote_args<RT>::type erf(RT z);
151 template <class RT, class Policy> // Error function.
152 typename tools::promote_args<RT>::type erf(RT z, const Policy&);
154 template <class RT>// Error function complement.
155 typename tools::promote_args<RT>::type erfc(RT z)
    [all...]
  /external/strace/tests/
sigaction.awk 29 NR == 4 && /^rt_sigaction\(SIGUSR2, {SIG_DFL, ~\[HUP( ((RT|SIGRT)[^] ]+|[3-9][0-9]|1[0-9][0-9]))*\], SA_RESTORER, 0x[0-9a-f]+}, {SIG_DFL, \[\], SA_RESTORER, 0x[0-9a-f]+}, (0x[0-9a-f]+, )?(4|8|16)\) = 0$/ {next}
30 NR == 4 && /^rt_sigaction\(SIGUSR2, {SIG_DFL, ~\[HUP( ((RT|SIGRT)[^] ]+|[3-9][0-9]|1[0-9][0-9]))*\], 0}, {SIG_DFL, \[\], 0}, (4|8|16)(, 0x[0-9a-f]+)?\) = 0$/ {next}
  /external/chromium_org/ui/gfx/geometry/
r_tree_unittest.cc 14 typedef RTree<int> RT;
18 void ValidateRTree(RTreeBase* rt) {
20 if (!rt->root()->count()) {
21 EXPECT_TRUE(rt->root()->rect().IsEmpty());
22 EXPECT_EQ(0, rt->root()->Level());
27 EXPECT_LE(rt->root()->count(), rt->max_children_);
29 EXPECT_GT(rt->root()->Level(), -1);
31 EXPECT_TRUE(rt->root()->parent() == NULL);
33 CheckBoundsConsistent(rt->root())
    [all...]
  /external/valgrind/main/none/tests/mips32/
vfp.c 49 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \
58 "mov.d %0, $" #RT "\n\t" \
59 "mfc1 %1, $" #RT "\n\t" \
60 "mfhc1 %2, $" #RT "\n\t" \
69 #define TESTINSN5LOAD(instruction, RTval, offset, RT) \
78 "mov.d %0, $" #RT "\n\t" \
79 "mfc1 %1, $" #RT "\n\t" \
91 #define TESTINSN5LOADw(instruction, RTval, offset, RT) \
99 "mov.d %0, $" #RT "\n\t" \
100 "mfc1 %1, $" #RT "\n\t"
    [all...]
MoveIns.c 24 // mfc1 rt, fs
25 #define TESTINSNMOVE(instruction, offset, FS, RT) \
34 "move %1, $" #RT "\n\t" \
37 : #RT, "cc", "memory" \
39 printf("%s :: fs %f, rt 0x%x\n", \
43 // mfhc1 rt, fs
44 #define TESTINSNMOVEd(instruction, offset, FS, RT) \
53 "move %1, $" #RT "\n\t" \
56 : #RT, "cc", "memory" \
58 printf("%s :: fs %lf, rt 0x%x\n",
    [all...]
LoadStore.c 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \
29 "li $" #RT", " #RTval"\n\t" \
34 : #RT, "cc", "memory" \
41 "li $" #RT", " #RTval"\n\t" \
46 : #RT, "cc", "memory" \
54 #define TESTINSTsw(RTval, offset, RT, RS) \
60 "li $" #RT", " #RTval"\n\t" \
66 : #RT, #RS, "cc", "memory" \
LoadStore1.c 24 #define TESTINST1(instruction, RTval, offset, RT, RS) \
29 "li $" #RT", " #RTval"\n\t" \
34 : #RT, "cc", "memory" \
41 "li $" #RT", " #RTval"\n\t" \
46 : #RT, "cc", "memory" \
54 #define TESTINSTsw(RTval, offset, RT, RS) \
60 "li $" #RT", " #RTval"\n\t" \
66 : #RT, #RS, "cc", "memory" \
  /external/clang/lib/CodeGen/
CodeGenTypes.cpp 159 if (const RecordType *RT = dyn_cast<RecordType>(T))
160 return isSafeToConvert(RT->getDecl(), CGT, AlreadyChecked);
199 const RecordType *RT = dyn_cast<RecordType>(TT);
200 if (!RT) return true;
209 return isSafeToConvert(RT->getDecl(), *this);
297 if (const RecordType *RT = dyn_cast<RecordType>(Ty))
298 return ConvertRecordDeclType(RT->getDecl());
480 if (const RecordType *RT = FT->getReturnType()->getAs<RecordType>())
481 ConvertRecordDeclType(RT->getDecl());
484 if (const RecordType *RT = FPT->getParamType(i)->getAs<RecordType>()
    [all...]
  /ndk/tests/device/issue42891-boost-1_52/jni/boost/boost/math/tools/
config.hpp 172 # define BOOST_MATH_INT_TABLE_TYPE(RT, IT) RT
177 # define BOOST_MATH_INT_TABLE_TYPE(RT, IT) RT
201 # define BOOST_MATH_INT_TABLE_TYPE(RT, IT) IT
  /external/clang/lib/Sema/
SemaStmtAsm.cpp 441 const RecordType *RT = nullptr;
444 RT = VD->getType()->getAs<RecordType>();
446 RT = TD->getUnderlyingType()->getAs<RecordType>();
448 RT = TD->getTypeForDecl()->getAs<RecordType>();
449 if (!RT)
452 if (RequireCompleteType(AsmLoc, QualType(RT, 0), 0))
458 if (!LookupQualifiedName(FieldResult, RT->getDecl()))
466 const ASTRecordLayout &RL = Context.getASTRecordLayout(RT->getDecl());

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