/external/llvm/lib/Target/NVPTX/ |
NVPTXISelDAGToDAG.h | 60 SDNode *Select(SDNode *N) override; 61 SDNode *SelectIntrinsicNoChain(SDNode *N); 62 SDNode *SelectIntrinsicChain(SDNode *N); 63 SDNode *SelectTexSurfHandle(SDNode *N); 64 SDNode *SelectLoad(SDNode *N) [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeTypes.h | 80 bool IgnoreNodeResults(SDNode *N) const { 119 SmallVector<SDNode*, 128> Worklist; 134 void NoteDeletion(SDNode *Old, SDNode *New) { 144 SDNode *AnalyzeNewNode(SDNode *N); 146 void ExpungeNode(SDNode *N); 154 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult); 155 bool CustomWidenLowerNode(SDNode *N, EVT VT); 160 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo) [all...] |
InstrEmitter.h | 42 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, 49 unsigned getDstOfOnlyCopyToRegUse(SDNode *Node, 52 void CreateVirtualRegisters(SDNode *Node, 92 void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 99 void EmitCopyToRegClassNode(SDNode *Node, 104 void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap, 110 static unsigned CountResults(SDNode *Node); 119 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned, 138 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, 140 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned [all...] |
SelectionDAGPrinter.cpp | 44 return ((const SDNode *) Node)->getNumValues(); 48 return ((const SDNode *) Node)->getValueType(i).getEVTString(); 53 return itostr(I - SDNodeIterator::begin((const SDNode *) Node)); 69 SDNode *TargetNode = *I; 83 static bool hasNodeAddressLabel(const SDNode *Node, 103 static std::string getSimpleNodeLabel(const SDNode *Node, 112 std::string getNodeLabel(const SDNode *Node, const SelectionDAG *Graph); 113 static std::string getNodeAttributes(const SDNode *N, 137 std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node, 177 void SelectionDAG::setGraphAttrs(const SDNode *N, const char *Attrs) [all...] |
ScheduleDAGSDNodes.h | 1 //===---- ScheduleDAGSDNodes.h - SDNode Scheduling --------------*- C++ -*-===// 11 // scheduling for an SDNode-based dependency graph. 22 /// ScheduleDAGSDNodes - A ScheduleDAG for scheduling SDNode-based DAGs. 32 /// SDNode-based scheduling graphs do not use SDep::Anti or SDep::Output 55 static bool isPassiveNode(SDNode *Node) { 75 SUnit *newSUnit(SDNode *N); 102 virtual void computeOperandLatency(SDNode *Def, SDNode *Use, 135 const SDNode *Node; 149 const SDNode *GetNode() const [all...] |
SDNodeDbgValue.h | 24 class SDNode; 33 SDNODE = 0, // value is the result of an expression 41 SDNode *Node; // valid for expressions 55 SDDbgValue(MDNode *mdP, SDNode *N, unsigned R, 60 kind = SDNODE; 88 // Returns the SDNode* for a register ref 89 SDNode *getSDNode() { assert (kind==SDNODE); return u.s.Node; } 92 unsigned getResNo() { assert (kind==SDNODE); return u.s.ResNo; } 114 // property. A SDDbgValue is invalid if the SDNode that produces the value i [all...] |
ScheduleDAGSDNodes.cpp | 69 SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) { 111 static void CheckForPhysRegDependency(SDNode *Def, SDNode *User, unsigned Op, 136 static void CloneNodeWithValues(SDNode *N, SelectionDAG *DAG, 163 static bool AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) { 165 SDNode *GlueDestNode = Glue.getNode(); 191 static void RemoveUnusedGlue(SDNode *N, SelectionDAG *DAG) { 208 void ScheduleDAGSDNodes::ClusterNeighboringLoads(SDNode *Node) { 209 SDNode *Chain = nullptr; 218 SmallPtrSet<SDNode*, 16> Visited [all...] |
LegalizeFloatTypes.cpp | 49 void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) { 112 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N) { 116 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N, 122 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) { 137 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) { 144 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N) { 156 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) { 169 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) { 181 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) { 223 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) [all...] |
SelectionDAGDumper.cpp | 32 std::string SDNode::getOperationName(const SelectionDAG *G) const { 329 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 339 void SDNode::dump() const { dump(nullptr); } 340 void SDNode::dump(const SelectionDAG *G) const { 345 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 358 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 533 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 551 const SDNode *N = I; 560 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 565 typedef SmallPtrSet<const SDNode *, 128> VisitedSDNodeSet [all...] |
ScheduleDAGFast.cpp | 217 SDNode *N = SU->getNode(); 238 SmallVector<SDNode*, 2> NewNodes; 246 SDNode *LoadNode = NewNodes[0]; 392 SUnit *CopyFromSU = newSUnit(static_cast<SDNode *>(nullptr)); 396 SUnit *CopyToSU = newSUnit(static_cast<SDNode *>(nullptr)); 434 static EVT getPhysicalRegisterVT(SDNode *N, unsigned Reg, 485 for (SDNode *Node = SU->getNode(); Node; Node = Node->getGluedNode()) { 656 std::vector<SDNode*> Sequence; 657 DenseMap<SDNode*, SDNode*> GluedMap; // Cache glue to its use [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAGISel.h | 78 virtual SDNode *Select(SDNode *N) = 0; 93 virtual bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const; 99 static bool IsLegalToFold(SDValue N, SDNode *U, SDNode *Root, 193 void ReplaceUses(SDNode *F, SDNode *T) { 223 virtual bool CheckNodePredicate(SDNode *N, unsigned PredNo) const { 227 virtual bool CheckComplexPattern(SDNode *Root, SDNode *Parent, SDValue N [all...] |
SelectionDAGNodes.h | 10 // This file declares the SDNode class and derived classes, which are used to 46 class SDNode; 71 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr, 88 bool isBuildVectorAllOnes(const SDNode *N); 92 bool isBuildVectorAllZeros(const SDNode *N); 96 bool isBuildVectorOfConstantSDNodes(const SDNode *N); 101 bool isScalarToVector(const SDNode *N); 105 bool allOperandsUndef(const SDNode *N); 120 SDNode *Node; // The node defining the value we are using. 124 SDValue(SDNode *node, unsigned resno) : Node(node), ResNo(resno) { [all...] |
SelectionDAG.h | 11 // SDNode class and subclasses. 79 template<> struct ilist_traits<SDNode> : public ilist_default_traits<SDNode> { 81 mutable ilist_half_node<SDNode> Sentinel; 83 SDNode *createSentinel() const { 84 return static_cast<SDNode*>(&Sentinel); 86 static void destroySentinel(SDNode *) {} 88 SDNode *provideInitialHead() const { return createSentinel(); } 89 SDNode *ensureHead(SDNode*) const { return createSentinel(); [all...] |
/external/llvm/lib/Target/Mips/ |
Mips16ISelDAGToDAG.h | 26 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc DL, 33 void getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg); 35 bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 38 std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
|
MipsISelDAGToDAG.h | 45 SDNode *getGlobalBaseReg(); 80 virtual bool selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 84 virtual bool selectVSplat(SDNode *N, APInt &Imm) const; 113 SDNode *Select(SDNode *N) override; 115 virtual std::pair<bool, SDNode*> selectNode(SDNode *Node) = 0; 118 inline SDValue getImm(const SDNode *Node, uint64_t Imm) {
|
MipsSEISelDAGToDAG.h | 37 std::pair<SDNode*, SDNode*> selectMULT(SDNode *N, unsigned Opc, SDLoc dl, 40 SDNode *selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, 41 SDLoc DL, SDNode *Node) const; 72 bool selectVSplat(SDNode *N, APInt &Imm) const override; 104 std::pair<bool, SDNode*> selectNode(SDNode *Node) override;
|
Mips16ISelDAGToDAG.cpp | 45 std::pair<SDNode*, SDNode*> 46 Mips16DAGToDAGISel::selectMULT(SDNode *N, unsigned Opc, SDLoc DL, EVT Ty, 48 SDNode *Lo = nullptr, *Hi = nullptr; 49 SDNode *Mul = CurDAG->getMachineNode(Opc, DL, MVT::Glue, N->getOperand(0), 127 void Mips16DAGToDAGISel::getMips16SPRefReg(SDNode *Parent, SDValue &AliasReg) { 162 SDNode *Parent, SDValue Addr, SDValue &Base, SDValue &Offset, 242 std::pair<bool, SDNode*> Mips16DAGToDAGISel::selectNode(SDNode *Node) { 281 SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops) [all...] |
MipsISelDAGToDAG.cpp | 60 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() { 104 bool MipsDAGToDAGISel::selectAddr16(SDNode *Parent, SDValue N, SDValue &Base, 110 bool MipsDAGToDAGISel::selectVSplat(SDNode *N, APInt &Imm) const { 177 SDNode* MipsDAGToDAGISel::Select(SDNode *Node) { 191 std::pair<bool, SDNode*> Ret = selectNode(Node); 215 SDNode *ResNode = SelectCode(Node);
|
/external/llvm/lib/Target/MSP430/ |
MSP430ISelDAGToDAG.cpp | 119 SDNode *Select(SDNode *N) override; 120 SDNode *SelectIndexedLoad(SDNode *Op); 121 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, 331 SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDNode *N) { 355 SDNode *MSP430DAGToDAGISel::SelectIndexedBinOp(SDNode *Op [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.h | 42 SDNode *foldOperands(MachineSDNode *N, SelectionDAG &DAG) const; 46 static SDValue performUCharToFloatCombine(SDNode *N, 72 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 73 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override; 75 SDNode *Node) const override; 77 int32_t analyzeImmediate(const SDNode *N) const;
|
AMDGPUISelDAGToDAG.cpp | 43 SDNode *Select(SDNode *N) override; 48 bool isInlineImmediate(SDNode *N) const; 81 const TargetRegisterClass *getOperandRegClass(SDNode *N, unsigned OpNo) const; 90 SDNode *SelectADD_SUB_I64(SDNode *N); 91 SDNode *SelectDIV_SCALE(SDNode *N); 111 bool AMDGPUDAGToDAGISel::isInlineImmediate(SDNode *N) const { 121 const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N [all...] |
R600ISelLowering.h | 30 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 31 void ReplaceNodeResults(SDNode * N, 72 SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override;
|
/external/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | 63 bool hasNumUsesBelowThresGA(SDNode *N) const; 65 SDNode *Select(SDNode *N) override; 91 bool SelectAddr(SDNode *Op, SDValue Addr, SDValue &Base, SDValue &Offset); 93 SDNode *SelectLoad(SDNode *N); 94 SDNode *SelectBaseOffsetLoad(LoadSDNode *LD, SDLoc dl); 95 SDNode *SelectIndexedLoad(LoadSDNode *LD, SDLoc dl); 96 SDNode *SelectIndexedLoadZeroExtend64(LoadSDNode *LD, unsigned Opcode, 98 SDNode *SelectIndexedLoadSignExtend64(LoadSDNode *LD, unsigned Opcode [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelDAGToDAG.cpp | 47 SDNode *Select(SDNode *N) override; 48 SDNode *SelectBRIND(SDNode *N); 56 inline bool immMskBitp(SDNode *inN) const { 134 SDNode *XCoreDAGToDAGISel::Select(SDNode *N) { 152 SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32, 199 if (SDNode *ResNode = SelectBRIND(N)) 233 SDNode *XCoreDAGToDAGISel::SelectBRIND(SDNode *N) [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelDAGToDAG.cpp | 44 SDNode *Select(SDNode *N) override; 64 SDNode* getGlobalBaseReg(); 68 SDNode* SparcDAGToDAGISel::getGlobalBaseReg() { 142 SDNode *SparcDAGToDAGISel::Select(SDNode *N) { 185 SDNode *Mul = CurDAG->getMachineNode(Opcode, dl, MVT::i32, MVT::Glue,
|