| /external/clang/test/CodeGen/ |
| ppc64-vector.c | 8 typedef short v16i16 __attribute__((vector_size (32))); typedef
10 struct v16i16 { v16i16 x; }; struct
43 v16i16 test_v16i16(v16i16 x)
48 // CHECK: define void @test_struct_v16i16(%struct.v16i16* noalias sret %agg.result, %struct.v16i16* byval align 16)
49 struct v16i16 test_struct_v16i16(struct v16i16 x)
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 192 { ISD::SDIV, MVT::v16i16, 6 }, // vpmulhw sequence
193 { ISD::UDIV, MVT::v16i16, 6 }, // vpmulhuw sequence
220 { ISD::SHL, MVT::v16i16, 16*10 }, // Scalarized.
223 { ISD::SRL, MVT::v16i16, 8*10 }, // Scalarized.
226 { ISD::SRA, MVT::v16i16, 16*10 }, // Scalarized.
231 { ISD::SDIV, MVT::v16i16, 16*20 },
235 { ISD::UDIV, MVT::v16i16, 16*20 },
242 if (ISD == ISD::SHL && LT.second == MVT::v16i16 &&
245 // On AVX2, a packed v16i16 shift left by a constant build_vector
356 { ISD::MUL, MVT::v16i16, 4 }
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 76 v16i16 = 30, // 16 x i16 enumerator in enum:llvm::MVT::SimpleValueType
219 SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 ||
285 case v16i16:
323 case v16i16:
417 case v16i16:
531 if (NumElements == 16) return MVT::v16i16;
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 258 { ISD::SINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 },
259 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 },
285 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 },
286 { ISD::FP_TO_UINT, MVT::v16i16, MVT::v16f32, 8 }
404 { ISD::SELECT, MVT::v16i1, MVT::v16i16, 2*16 + 1 + 3*1 + 4*1 },
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 148 case MVT::v16i16: return "v16i16";
216 case MVT::v16i16: return VectorType::get(Type::getInt16Ty(Context), 16);
|
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86InstComments.cpp | 130 DecodePSHUFHWMask(MVT::v16i16,
152 DecodePSHUFLWMask(MVT::v16i16,
191 DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
264 DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 451 { ISD::SELECT, MVT::v16i1, MVT::v16i16, 16 * AmortizationCost },
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 89 case MVT::v16i16: return "MVT::v16i16";
|
| /external/llvm/lib/Target/R600/ |
| SIISelLowering.cpp | 146 setLoadExtAction(ISD::SEXTLOAD, MVT::v16i16, Expand);
164 setTruncStoreAction(MVT::v16i32, MVT::v16i16, Expand);
[all...] |
