| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 98 v8f32 = 48, // 8 x f32 enumerator in enum:llvm::MVT::SimpleValueType
218 return (SimpleTy == MVT::v8f32 || SimpleTy == MVT::v4f64 ||
303 case v8f32:
333 case v8f32:
420 case v8f32:
557 if (NumElements == 8) return MVT::v8f32;
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 438 {ISD::VECTOR_SHUFFLE, MVT::v8f32, 1}, // vblendps
621 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i1, 8 },
622 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i8, 8 },
623 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 5 },
624 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i32, 1 },
634 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i1, 6 },
635 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 5 },
636 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 5 },
637 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 9 },
654 { ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 7 }
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 254 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
255 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
256 { ISD::SINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 },
257 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 },
283 { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 4 },
284 { ISD::FP_TO_UINT, MVT::v8i16, MVT::v8f32, 4 },
|
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 166 case MVT::v8f32: return "v8f32";
234 case MVT::v8f32: return VectorType::get(Type::getFloatTy(Context), 8);
|
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86InstComments.cpp | 346 DecodeSHUFPMask(MVT::v8f32,
385 DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
421 DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
440 DecodePSHUFMask(MVT::v8f32,
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 107 case MVT::v8f32: return "MVT::v8f32";
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 148 setOperationAction(ISD::STORE, MVT::v8f32, Promote);
149 AddPromotedToType(ISD::STORE, MVT::v8f32, MVT::v8i32);
194 setOperationAction(ISD::LOAD, MVT::v8f32, Promote);
195 AddPromotedToType(ISD::LOAD, MVT::v8f32, MVT::v8i32);
209 setOperationAction(ISD::CONCAT_VECTORS, MVT::v8f32, Custom);
214 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8f32, Custom);
[all...] |
| SIISelLowering.cpp | 50 addRegisterClass(MVT::v8f32, &AMDGPU::VReg_256RegClass);
73 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand);
179 MVT::v8i32, MVT::v8f32, MVT::v16i32, MVT::v16f32
[all...] |
