| /external/llvm/test/CodeGen/X86/ |
| 2011-08-29-InitOrder.ll | 1 ; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck %s --check-prefix=CHECK-DEFAULT
2 ; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s --check-prefix=CHECK-DARWIN
6 ; CHECK-DEFAULT: .section .ctors.64535,"aw",@progbits
7 ; CHECK-DEFAULT: .long construct_1
8 ; CHECK-DEFAULT: .section .ctors.63535,"aw",@progbits
9 ; CHECK-DEFAULT: .long construct_2
10 ; CHECK-DEFAULT: .section .ctors.62535,"aw",@progbits
11 ; CHECK-DEFAULT: .long construct_
[all...] |
| lower-bitcast.ll | 2 ; RUN: llc < %s -march=x86-64 -mcpu=core2 -mattr=+sse2 -x86-experimental-vector-widening-legalization | FileCheck %s --check-prefix=CHECK-WIDE
15 ; CHECK-LABEL: test1
16 ; CHECK-NOT: movsd
17 ; CHECK: pshufd
18 ; CHECK-NEXT: paddd
19 ; CHECK-NEXT: pshufd
20 ; CHECK-NEXT: ret
22 ; CHECK-WIDE-LABEL: test1
23 ; CHECK-WIDE-NOT: movs
[all...] |
| weak_def_can_be_hidden.ll | 3 ; RUN: llc -mtriple=x86_64-apple-darwin9 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
4 ; RUN: llc -mtriple=i686-apple-darwin9 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
5 ; RUN: llc -mtriple=i686-apple-darwin8 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
8 ; CHECK: .globl _v1
9 ; CHECK: .weak_def_can_be_hidden _v1
11 ; CHECK-D89: .globl _v1
12 ; CHECK-D89: .weak_definition _v
[all...] |
| scalar_widen_div.ll | 6 ; CHECK: vectorDiv
8 ; CHECK: idivq
9 ; CHECK: idivq
10 ; CHECK-NOT: idivl
11 ; CHECK: ret
36 ; CHECK: test_char_div
38 ; CHECK: idivb
39 ; CHECK: idivb
40 ; CHECK: idivb
41 ; CHECK-NOT: idiv
[all...] |
| /external/llvm/test/MC/Mips/ |
| micromips-expressions.s | 3 # Check that the assembler can handle the expressions as operands.
4 # CHECK: .text
5 # CHECK: .globl foo
6 # CHECK: foo:
7 # CHECK: lw $4, %lo(foo)($4) # encoding: [0x84'A',0xfc'A',0x00,0x00]
8 # CHECK: # fixup A - offset: 0,
9 # CHECK: value: foo@ABS_LO,
10 # CHECK: kind: fixup_MICROMIPS_LO16
11 # CHECK: lw $4, 56($4) # encoding: [0x84,0xfc,0x38,0x00]
12 # CHECK: lw $4, %lo(foo+8)($4) # encoding: [0x84'A',0xfc'A',0x08,0x00
[all...] |
| /external/clang/test/CodeGen/ |
| catch-undef-behavior.c | 2 // RUN: %clang_cc1 -fsanitize-undefined-trap-on-error -fsanitize=alignment,null,object-size,shift,return,signed-integer-overflow,vla-bound,float-cast-overflow,integer-divide-by-zero,bool -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK-TRAP
3 // RUN: %clang_cc1 -fsanitize=null -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK-NULL
4 // RUN: %clang_cc1 -fsanitize=signed-integer-overflow -emit-llvm %s -o - -triple x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK-OVERFLOW
6 // CHECK: @[[INT:.*]] = private unnamed_addr constant { i16, i16, [6 x i8] } { i16 0, i16 11, [6 x i8] c"'int'\00" }
9 // CHECK: @[[LINE_100:.*]] = private unnamed_addr global {{.*}}, i32 100, i32 5 {{.*}} @[[INT]], i64 4, i8 1
10 // CHECK: @[[LINE_200:.*]] = {{.*}}, i32 200, i32 10 {{.*}}, i64 4, i8 0
11 // CHECK: @[[LINE_300:.*]] = {{.*}}, i32 300, i32 12 {{.*}} @{{.*}}, {{.*}} @{{.*}
[all...] |
| aarch64-poly128.c | 3 // RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s --check-prefix=CHECK \
4 // RUN: --check-prefix=CHECK-ARM64
16 // CHECK-LABEL: test_vstrq_p128
19 // CHECK-ARM64: stp {{x[0-9]+}}, {{x[0-9]+}}, [x0]
23 // CHECK-LABEL: test_vldrq_p128
26 // CHECK-ARM64: ldp {{x[0-9]+}}, {{x[0-9]+}}, [x0]
30 // CHECK-LABEL: test_ld_st_p128
33 // CHECK-ARM64: ldp [[PLO:x[0-9]+]], [[PHI:x[0-9]+]], [{{x[0-9]+}}
[all...] |
| Atomics.c | 14 void test_op_ignore (void) // CHECK-LABEL: define void @test_op_ignore
16 (void) __sync_fetch_and_add (&sc, 1); // CHECK: atomicrmw add i8
17 (void) __sync_fetch_and_add (&uc, 1); // CHECK: atomicrmw add i8
18 (void) __sync_fetch_and_add (&ss, 1); // CHECK: atomicrmw add i16
19 (void) __sync_fetch_and_add (&us, 1); // CHECK: atomicrmw add i16
20 (void) __sync_fetch_and_add (&si, 1); // CHECK: atomicrmw add i32
21 (void) __sync_fetch_and_add (&ui, 1); // CHECK: atomicrmw add i32
22 (void) __sync_fetch_and_add (&sll, 1); // CHECK: atomicrmw add i64
23 (void) __sync_fetch_and_add (&ull, 1); // CHECK: atomicrmw add i64
25 (void) __sync_fetch_and_sub (&sc, 1); // CHECK: atomicrmw sub i
[all...] |
| unsigned-overflow.c | 11 // CHECK-LABEL: define void @testlongadd()
14 // CHECK: [[T1:%.*]] = load i64* @lj
15 // CHECK-NEXT: [[T2:%.*]] = load i64* @lk
16 // CHECK-NEXT: [[T3:%.*]] = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 [[T1]], i64 [[T2]])
17 // CHECK-NEXT: [[T4:%.*]] = extractvalue { i64, i1 } [[T3]], 0
18 // CHECK-NEXT: [[T5:%.*]] = extractvalue { i64, i1 } [[T3]], 1
19 // CHECK: call void @__ubsan_handle_add_overflow
23 // CHECK-LABEL: define void @testlongsub()
26 // CHECK: [[T1:%.*]] = load i64* @lj
27 // CHECK-NEXT: [[T2:%.*]] = load i64* @l
[all...] |
| aarch64-neon-fcvt-intrinsics.c | 10 // CHECK-LABEL: test_vcvtxd_f32_f64
11 // CHECK: fcvtxn {{s[0-9]+}}, {{d[0-9]+}}
16 // CHECK-LABEL: test_vcvtas_s32_f32
17 // CHECK: fcvtas {{[ws][0-9]+}}, {{s[0-9]+}}
22 // CHECK-LABEL: test_test_vcvtad_s64_f64
23 // CHECK: fcvtas {{[dx][0-9]+}}, {{d[0-9]+}}
28 // CHECK-LABEL: test_vcvtas_u32_f32
29 // CHECK: fcvtau {{[ws][0-9]+}}, {{s[0-9]+}}
34 // CHECK-LABEL: test_vcvtad_u64_f64
35 // CHECK: fcvtau {{[xd][0-9]+}}, {{d[0-9]+}
[all...] |
| /external/clang/test/Driver/ |
| Ofast.c | 1 // RUN: %clang -Ofast -### %s 2>&1 | FileCheck -check-prefix=CHECK-OFAST %s
2 // RUN: %clang -O2 -Ofast -### %s 2>&1 | FileCheck -check-prefix=CHECK-OFAST %s
3 // RUN: %clang -fno-fast-math -Ofast -### %s 2>&1 | FileCheck -check-prefix=CHECK-OFAST %s
4 // RUN: %clang -fno-strict-aliasing -Ofast -### %s 2>&1 | FileCheck -check-prefix=CHECK-OFAST %s
5 // RUN: %clang -fno-vectorize -Ofast -### %s 2>&1 | FileCheck -check-prefix=CHECK-OFAST %
[all...] |
| color-diagnostics.c | 2 // RUN: | FileCheck --check-prefix=CHECK-CD %s
3 // CHECK-CD: clang{{.*}}" "-fcolor-diagnostics"
6 // RUN: | FileCheck --check-prefix=CHECK-NCD %s
7 // CHECK-NCD-NOT: clang{{.*}}" "-fcolor-diagnostics"
10 // RUN: | FileCheck --check-prefix=CHECK-DC %s
11 // CHECK-DC: clang{{.*}}" "-fcolor-diagnostics"
14 // RUN: | FileCheck --check-prefix=CHECK-NDC %
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| asm-17.ll | 7 ; CHECK-LABEL: f1:
8 ; CHECK: lhi %r4, 1
9 ; CHECK: blah %r4
10 ; CHECK: lr %r2, %r4
11 ; CHECK: br %r14
18 ; CHECK-LABEL: f2:
19 ; CHECK: lghi %r4, 1
20 ; CHECK: blah %r4
21 ; CHECK: lgr %r2, %r4
22 ; CHECK: br %r1
[all...] |
| atomicrmw-xchg-04.ll | 5 ; Check register exchange.
7 ; CHECK-LABEL: f1:
8 ; CHECK: lg %r2, 0(%r3)
9 ; CHECK: [[LABEL:\.[^:]*]]:
10 ; CHECK: csg %r2, %r4, 0(%r3)
11 ; CHECK: jl [[LABEL]]
12 ; CHECK: br %r14
17 ; Check the high end of the aligned CSG range.
19 ; CHECK-LABEL: f2:
20 ; CHECK: lg %r2, 524280(%r3
[all...] |
| int-const-05.ll | 5 ; Check moves of zero.
7 ; CHECK-LABEL: f1:
8 ; CHECK: mvhi 0(%r2), 0
9 ; CHECK: br %r14
14 ; Check the high end of the signed 16-bit range.
16 ; CHECK-LABEL: f2:
17 ; CHECK: mvhi 0(%r2), 32767
18 ; CHECK: br %r14
23 ; Check the next value up, which can't use MVHI.
25 ; CHECK-LABEL: f3
[all...] |
| int-const-06.ll | 5 ; Check moves of zero.
7 ; CHECK-LABEL: f1:
8 ; CHECK: mvghi 0(%r2), 0
9 ; CHECK: br %r14
14 ; Check the high end of the signed 16-bit range.
16 ; CHECK-LABEL: f2:
17 ; CHECK: mvghi 0(%r2), 32767
18 ; CHECK: br %r14
23 ; Check the next value up, which can't use MVGHI.
25 ; CHECK-LABEL: f3
[all...] |
| selectcc-03.ll | 7 ; CHECK-LABEL: f1:
8 ; CHECK: ipm [[REG:%r[0-5]]]
9 ; CHECK-NEXT: afi [[REG]], -268435456
10 ; CHECK-NEXT: sllg [[REG]], [[REG]], 32
11 ; CHECK-NEXT: srag %r2, [[REG]], 63
12 ; CHECK: br %r14
20 ; CHECK-LABEL: f2:
21 ; CHECK: ipm [[REG:%r[0-5]]]
22 ; CHECK-NEXT: xilf [[REG]], 268435456
23 ; CHECK-NEXT: afi [[REG]], -26843545
[all...] |
| /external/llvm/test/MC/ARM/ |
| directive-eabi_attribute-2.s | 7 @ CHECK: .eabi_attribute 4, "Cortex-A9"
9 @ CHECK: .cpu cortex-a9
11 @ CHECK: .eabi_attribute 6, 10
13 @ CHECK: .eabi_attribute 7, 65
15 @ CHECK: .eabi_attribute 8, 0
17 @ CHECK: .eabi_attribute 9, 2
19 @ CHECK: .eabi_attribute 10, 3
21 @ CHECK: .eabi_attribute 11, 0
23 @ CHECK: .eabi_attribute 12, 1
25 @ CHECK: .eabi_attribute 13,
[all...] |
| thumb2-diagnostics.s | 2 @ RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s
13 @ CHECK-ERRORS: error: incorrect condition in IT block; got 'le', but expected 'eq'
14 @ CHECK-ERRORS: addle r0, r1, r2
15 @ CHECK-ERRORS: ^
16 @ CHECK-ERRORS: error: incorrect condition in IT block; got 'al', but expected 'ne'
17 @ CHECK-ERRORS: nop
18 @ CHECK-ERRORS: ^
19 @ CHECK-ERRORS: error: instructions in IT block must be predicable
20 @ CHECK-ERRORS: it l
[all...] |
| /external/clang/test/CodeGenObjCXX/ |
| arc-exceptions.mm | 14 // CHECK-LABEL: define void @_Z5test0v()
15 // CHECK: [[E:%.*]] = alloca [[ETY:%.*]]*, align 8
16 // CHECK-NEXT: invoke void @_Z12test0_helperv()
17 // CHECK: [[T0:%.*]] = call i8* @objc_begin_catch(
18 // CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[ETY]]*
19 // CHECK-NEXT: [[T2:%.*]] = bitcast [[ETY]]* [[T1]] to i8*
20 // CHECK-NEXT: [[T3:%.*]] = call i8* @objc_retain(i8* [[T2]]) [[NUW:#[0-9]+]]
21 // CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to [[ETY]]*
22 // CHECK-NEXT: store [[ETY]]* [[T4]], [[ETY]]** [[E]]
23 // CHECK-NEXT: [[T0:%.*]] = bitcast [[ETY]]** [[E]] to i8*
[all...] |
| literals.mm | 17 // CHECK-LABEL: define void @_Z10test_arrayv
19 // CHECK: [[OBJECTS:%[a-zA-Z0-9.]+]] = alloca [2 x i8*]
22 // CHECK: [[ELEMENT0:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*]* [[OBJECTS]], i32 0, i32 0
23 // CHECK-NEXT: call void @_ZN1XC1Ev
24 // CHECK-NEXT: [[OBJECT0:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1XcvP11objc_objectEv
25 // CHECK: [[RET0:%[a-zA-Z0-9.]+]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[OBJECT0]])
26 // CHECK: store i8* [[RET0]], i8** [[ELEMENT0]]
29 // CHECK: [[ELEMENT1:%[a-zA-Z0-9.]+]] = getelementptr inbounds [2 x i8*]* [[OBJECTS]], i32 0, i32 1
30 // CHECK-NEXT: invoke void @_ZN1YC1Ev
31 // CHECK: [[OBJECT1:%[a-zA-Z0-9.]+]] = invoke i8* @_ZNK1YcvP11objc_objectE
[all...] |
| /external/llvm/test/MC/Disassembler/Sparc/ |
| sparc.txt | 3 # CHECK: add %g0, %g0, %g0
6 # CHECK: add %g1, %g2, %g3
9 # CHECK: add %o0, %o1, %l0
12 # CHECK: add %o0, 10, %l0
15 # CHECK: addcc %g1, %g2, %g3
18 # CHECK: addxcc %g1, %g2, %g3
21 # CHECK: udiv %g1, %g2, %g3
24 # CHECK: sdiv %g1, %g2, %g3
27 # CHECK: and %g1, %g2, %g3
30 # CHECK: andn %g1, %g2, %g
[all...] |
| /external/clang/test/CodeGenCXX/ |
| vtable-layout-extreme.cpp | 78 // CHECK: Vtable for 'Test1::C9' (87 entries).
79 // CHECK-NEXT: 0 | vbase_offset (344)
80 // CHECK-NEXT: 1 | vbase_offset (312)
81 // CHECK-NEXT: 2 | vbase_offset (184)
82 // CHECK-NEXT: 3 | vbase_offset (168)
83 // CHECK-NEXT: 4 | vbase_offset (120)
84 // CHECK-NEXT: 5 | vbase_offset (48)
85 // CHECK-NEXT: 6 | vbase_offset (148)
86 // CHECK-NEXT: 7 | vbase_offset (152)
87 // CHECK-NEXT: 8 | offset_to_top (0
[all...] |
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| ppc64-encoding-vmx.txt | 3 # CHECK: lvebx 2, 3, 4
6 # CHECK: lvehx 2, 3, 4
9 # CHECK: lvewx 2, 3, 4
12 # CHECK: lvx 2, 3, 4
15 # CHECK: lvxl 2, 3, 4
18 # CHECK: stvebx 2, 3, 4
21 # CHECK: stvehx 2, 3, 4
24 # CHECK: stvewx 2, 3, 4
27 # CHECK: stvx 2, 3, 4
30 # CHECK: stvxl 2, 3, 4
[all...] |
| /external/llvm/test/Instrumentation/MemorySanitizer/ |
| msan_basic.ll | 1 ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
2 ; RUN: opt < %s -msan -msan-check-access-address=0 -msan-track-origins=1 -S | FileCheck -check-prefix=CHECK -check-prefix=CHECK-ORIGINS %s
7 ; Check the presence of __msan_init
8 ; CHECK: @llvm.global_ctors {{.*}} @__msan_init
10 ; Check the presence and the linkage type of __msan_track_origins and
12 ; CHECK-NOT: @__msan_track_origin
[all...] |
