| /external/llvm/lib/CodeGen/ |
| PHIElimination.cpp | 248 TII->get(TargetOpcode::IMPLICIT_DEF), DestReg);
264 TII->get(TargetOpcode::COPY), DestReg)
388 TII->get(TargetOpcode::IMPLICIT_DEF),
397 TII->get(TargetOpcode::COPY), IncomingReg)
|
| ProcessImplicitDefs.cpp | 89 UserMI->setDesc(TII->get(TargetOpcode::IMPLICIT_DEF));
|
| LocalStackSlotAllocation.cpp | 293 MI->getOpcode() == TargetOpcode::STACKMAP ||
294 MI->getOpcode() == TargetOpcode::PATCHPOINT)
|
| TargetInstrInfo.cpp | 386 case TargetOpcode::STACKMAP:
389 case TargetOpcode::PATCHPOINT: {
461 if (MI->getOpcode() == TargetOpcode::STACKMAP ||
462 MI->getOpcode() == TargetOpcode::PATCHPOINT) {
529 if ((MI->getOpcode() == TargetOpcode::STACKMAP ||
530 MI->getOpcode() == TargetOpcode::PATCHPOINT) &&
|
| StackMaps.cpp | 244 assert(MI.getOpcode() == TargetOpcode::STACKMAP && "expected stackmap");
252 assert(MI.getOpcode() == TargetOpcode::PATCHPOINT && "expected patchpoint");
|
| InlineSpiller.cpp | 806 MI->setDesc(TII.get(TargetOpcode::KILL));
[all...] |
| MachineCopyPropagation.cpp | 134 MI->setDesc(TII->get(TargetOpcode::KILL));
|
| MachineInstrBundle.cpp | 111 TII->get(TargetOpcode::BUNDLE));
|
| PeepholeOptimizer.cpp | 336 if (UseMI->getOpcode() == TargetOpcode::SUBREG_TO_REG)
393 TII->get(TargetOpcode::COPY), NewVR)
584 TII->get(TargetOpcode::COPY), NewVR)
[all...] |
| TailDuplication.cpp | 835 TII->get(TargetOpcode::COPY),
896 TII->get(TargetOpcode::COPY),
[all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 453 TII->get(TargetOpcode::COPY), Out)
469 TII->get(TargetOpcode::REG_SEQUENCE), Out)
504 TII->get(TargetOpcode::INSERT_SUBREG), Out)
520 TII->get(TargetOpcode::IMPLICIT_DEF), Out);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZFrameLowering.cpp | 340 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
355 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
369 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
402 BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::CFI_INSTRUCTION))
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterInfo.cpp | 336 if (MI.isDebugValue() || MI.getOpcode() == TargetOpcode::STACKMAP ||
337 MI.getOpcode() == TargetOpcode::PATCHPOINT) {
|
| AArch64FrameLowering.cpp | 197 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
235 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
378 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
385 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
391 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
397 BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
[all...] |
| AArch64AsmPrinter.cpp | 504 case TargetOpcode::STACKMAP:
507 case TargetOpcode::PATCHPOINT:
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGRRList.cpp | 299 if (Opcode == TargetOpcode::REG_SEQUENCE) {
[all...] |
| ScheduleDAGSDNodes.cpp | 83 N->getMachineOpcode() == TargetOpcode::IMPLICIT_DEF))
545 if (POpc == TargetOpcode::IMPLICIT_DEF) {
777 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), Reg)
786 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), VRBase)
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 72 return MI->getOpcode() == TargetOpcode::IMPLICIT_DEF ||
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
| X86CodeEmitter.cpp | [all...] |
| X86FrameLowering.cpp | 333 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
563 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
571 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
593 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
621 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
822 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 272 case TargetOpcode::INLINEASM: { // Inline Asm: Variable size.
|
| MipsOptimizePICCall.cpp | 136 BuildMI(*MBB, I, I->getDebugLoc(), TII.get(TargetOpcode::COPY), DstReg)
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCFrameLowering.cpp | 728 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
735 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
743 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
751 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
768 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
796 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
804 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
[all...] |
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 98 if (MI->getOpcode() == TargetOpcode::COPY_TO_REGCLASS)
|
