| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUTargetMachine.h | 36 AMDGPUTargetLowering * TLInfo;
58 virtual AMDGPUTargetLowering * getTargetLowering() const {
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| AMDGPUISelLowering.cpp | 23 AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
48 SDValue AMDGPUTargetLowering::LowerFormalArguments(
64 SDValue AMDGPUTargetLowering::LowerReturn(
79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
101 SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
149 SDValue AMDGPUTargetLowering::LowerIntrinsicIABS(SDValue Op,
163 SDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op,
180 SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op,
291 bool AMDGPUTargetLowering::isHWTrueValue(SDValue Op) cons
[all...] |
| R600ISelLowering.h | 23 class R600TargetLowering : public AMDGPUTargetLowering
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| AMDILISelLowering.cpp | 47 void AMDGPUTargetLowering::InitAMDILLowering()
243 AMDGPUTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
250 AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const
261 AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const
277 AMDGPUTargetLowering::computeMaskedBitsForTargetNode(
317 AMDGPUTargetLowering::LowerSDIV(SDValue Op, SelectionDAG &DAG) const
335 AMDGPUTargetLowering::LowerSREM(SDValue Op, SelectionDAG &DAG) const
354 AMDGPUTargetLowering::LowerBUILD_VECTOR( SDValue Op, SelectionDAG &DAG ) const
420 AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const
451 AMDGPUTargetLowering::genIntType(uint32_t size, uint32_t numEle) cons
[all...] |
| SIISelLowering.h | 22 class SITargetLowering : public AMDGPUTargetLowering
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| AMDGPUISelLowering.h | 24 class AMDGPUTargetLowering : public TargetLowering
42 AMDGPUTargetLowering(TargetMachine &TM);
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| SIISelLowering.cpp | 27 AMDGPUTargetLowering(TM),
79 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
264 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
277 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
443 default: return AMDGPUTargetLowering::getTargetNodeName(Opcode);
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| R600ISelLowering.cpp | 26 AMDGPUTargetLowering(TM),
61 default: return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
248 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
280 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUTargetMachine.h | 36 AMDGPUTargetLowering * TLInfo;
58 virtual AMDGPUTargetLowering * getTargetLowering() const {
|
| AMDGPUISelLowering.cpp | 23 AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
48 SDValue AMDGPUTargetLowering::LowerFormalArguments(
64 SDValue AMDGPUTargetLowering::LowerReturn(
79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG)
101 SDValue AMDGPUTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
149 SDValue AMDGPUTargetLowering::LowerIntrinsicIABS(SDValue Op,
163 SDValue AMDGPUTargetLowering::LowerIntrinsicLRP(SDValue Op,
180 SDValue AMDGPUTargetLowering::LowerUDIVREM(SDValue Op,
291 bool AMDGPUTargetLowering::isHWTrueValue(SDValue Op) cons
[all...] |
| R600ISelLowering.h | 23 class R600TargetLowering : public AMDGPUTargetLowering
|
| AMDILISelLowering.cpp | 47 void AMDGPUTargetLowering::InitAMDILLowering()
243 AMDGPUTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
250 AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const
261 AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const
277 AMDGPUTargetLowering::computeMaskedBitsForTargetNode(
317 AMDGPUTargetLowering::LowerSDIV(SDValue Op, SelectionDAG &DAG) const
335 AMDGPUTargetLowering::LowerSREM(SDValue Op, SelectionDAG &DAG) const
354 AMDGPUTargetLowering::LowerBUILD_VECTOR( SDValue Op, SelectionDAG &DAG ) const
420 AMDGPUTargetLowering::LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const
451 AMDGPUTargetLowering::genIntType(uint32_t size, uint32_t numEle) cons
[all...] |
| SIISelLowering.h | 22 class SITargetLowering : public AMDGPUTargetLowering
|
| AMDGPUISelLowering.h | 24 class AMDGPUTargetLowering : public TargetLowering
42 AMDGPUTargetLowering(TargetMachine &TM);
|
| SIISelLowering.cpp | 27 AMDGPUTargetLowering(TM),
79 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
264 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
277 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
443 default: return AMDGPUTargetLowering::getTargetNodeName(Opcode);
|
| R600ISelLowering.cpp | 26 AMDGPUTargetLowering(TM),
61 default: return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
248 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
280 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUTargetMachine.h | 33 std::unique_ptr<AMDGPUTargetLowering> TLInfo;
56 AMDGPUTargetLowering *getTargetLowering() const override {
|
| AMDGPUISelLowering.cpp | 88 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) {
98 EVT AMDGPUTargetLowering::getEquivalentLoadRegType(LLVMContext &Ctx, EVT VT) {
106 AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
389 MVT AMDGPUTargetLowering::getVectorIdxTy() const {
393 bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const {
399 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
405 bool AMDGPUTargetLowering::ShouldShrinkFPConstant(EVT VT) const {
410 bool AMDGPUTargetLowering::isLoadBitCastBeneficial(EVT LoadTy,
427 bool AMDGPUTargetLowering::isFAbsFree(EVT VT) const
[all...] |
| AMDGPUTargetTransformInfo.cpp | 42 const AMDGPUTargetLowering *TLI;
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| R600ISelLowering.h | 24 class R600TargetLowering : public AMDGPUTargetLowering {
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| SIISelLowering.h | 23 class SITargetLowering : public AMDGPUTargetLowering {
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| AMDGPUISelLowering.h | 27 class AMDGPUTargetLowering : public TargetLowering {
105 AMDGPUTargetLowering(TargetMachine &TM);
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| SIISelLowering.cpp | 32 AMDGPUTargetLowering(TM) {
467 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
604 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
642 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
844 SDValue Lowered = AMDGPUTargetLowering::LowerLOAD(Op, DAG);
[all...] |
| R600ISelLowering.cpp | 33 AMDGPUTargetLowering(TM),
211 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
571 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
628 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
840 AMDGPUTargetLowering::ReplaceNodeResults(N, Results, DAG);
[all...] |
| AMDGPUISelDAGToDAG.cpp | 780 const AMDGPUTargetLowering& Lowering =
781 *static_cast<const AMDGPUTargetLowering*>(getTargetLowering());
|
