| /external/llvm/lib/CodeGen/ |
| TargetFrameLoweringImpl.cpp | 36 int FI, unsigned &FrameReg) const {
42 FrameReg = RI->getFrameRegister(MF);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.cpp | 104 unsigned FrameReg;
107 FrameReg = Mips::SP;
111 FrameReg = Mips::S0;
115 FrameReg = MI.getOperand(OpNo+2).getReg();
117 FrameReg = Mips::SP;
138 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
145 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
149 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
|
| MipsSERegisterInfo.cpp | 132 unsigned FrameReg;
135 FrameReg = Subtarget.isABI_N64() ? Mips::SP_64 : Mips::SP;
137 FrameReg = getFrameRegister(MF);
176 BuildMI(MBB, II, DL, TII.get(ADDiu), Reg).addReg(FrameReg).addImm(Offset);
178 FrameReg = Reg;
193 BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg)
196 FrameReg = Reg;
202 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
|
| Mips16InstrInfo.h | 83 // This is to adjust some FrameReg. We return the new register to be used
84 // in place of FrameReg and the adjusted immediate field (&NewImm)
86 unsigned loadImmediate(unsigned FrameReg,
|
| Mips16InstrInfo.cpp | 309 Mips16InstrInfo::loadImmediate(unsigned FrameReg,
393 if (FrameReg == Mips::SP) {
412 BuildMI(MBB, II, DL, get(Mips:: AdduRxRyRz16), Reg).addReg(FrameReg)
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.h | 42 unsigned &FrameReg) const override;
44 unsigned &FrameReg,
|
| AArch64RegisterInfo.cpp | 332 unsigned FrameReg;
338 Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg,
341 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
347 Offset = TFI->resolveFrameIndexReference(MF, FrameIndex, FrameReg);
348 if (rewriteAArch64FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
359 emitFrameOffset(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg, Offset, TII);
|
| AArch64FrameLowering.cpp | 532 unsigned FrameReg;
533 return getFrameIndexReference(MF, FI, FrameReg);
542 unsigned &FrameReg) const {
543 return resolveFrameIndexReference(MF, FI, FrameReg);
547 int FI, unsigned &FrameReg,
586 FrameReg = RegInfo->getFrameRegister(MF);
592 FrameReg = RegInfo->getBaseRegister();
594 FrameReg = AArch64::SP;
[all...] |
| AArch64InstrInfo.h | 179 unsigned FrameReg, int &Offset,
|
| AArch64InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFrameLowering.h | 48 unsigned &FrameReg) const override;
50 unsigned &FrameReg, int SPAdj) const;
|
| Thumb1RegisterInfo.cpp | 345 unsigned FrameReg, int &Offset,
361 if (FrameReg != ARM::SP) {
375 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
388 AddDefaultPred(AddDefaultT1CC(MIB).addReg(FrameReg)
391 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
403 emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,
416 AddDefaultPred(AddDefaultT1CC(MIB).addReg(FrameReg).addImm(Mask));
418 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
433 MI.getOperand(FrameRegIdx+1).ChangeToRegister(FrameReg, false);
442 unsigned NumBits = (FrameReg == ARM::SP) ? 8 : 5
[all...] |
| Thumb1RegisterInfo.h | 48 unsigned FrameReg, int &Offset,
|
| ARMBaseRegisterInfo.cpp | 716 unsigned FrameReg;
718 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
725 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
740 Done = rewriteARMFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
743 Done = rewriteT2FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII);
763 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false);
767 emitARMRegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
771 emitT2RegPlusImmediate(MBB, II, MI.getDebugLoc(), ScratchReg, FrameReg,
|
| Thumb2InstrInfo.cpp | 438 unsigned FrameReg, int &Offset,
456 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
477 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
490 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
526 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
590 MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);
|
| ARMFrameLowering.cpp | 711 unsigned &FrameReg) const {
712 return ResolveFrameIndexReference(MF, FI, FrameReg, 0);
717 int FI, unsigned &FrameReg,
727 FrameReg = ARM::SP;
739 FrameReg = RegInfo->getFrameRegister(MF);
744 FrameReg = RegInfo->getBaseRegister();
754 FrameReg = RegInfo->getFrameRegister(MF);
763 FrameReg = RegInfo->getFrameRegister(MF);
776 FrameReg = RegInfo->getFrameRegister(MF);
781 FrameReg = RegInfo->getFrameRegister(MF)
[all...] |
| ARMBaseInstrInfo.h | 432 unsigned FrameReg, int &Offset,
436 unsigned FrameReg, int &Offset,
|
| ARMBaseInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 135 unsigned FrameReg = getFrameRegister(MF);
180 dstReg).addReg(FrameReg).addReg(dstReg);
184 dstReg).addReg(FrameReg).addImm(Offset);
209 resReg).addReg(FrameReg).addReg(resReg);
213 resReg).addReg(FrameReg).addImm(Offset);
222 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false);
240 TII.get(Hexagon::ADD_rr), ResReg).addReg(FrameReg).
247 TII.get(Hexagon::ADD_ri), ResReg).addReg(FrameReg).
260 dstReg).addReg(FrameReg).addReg(dstReg);
268 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 63 unsigned Reg, unsigned FrameReg, int Offset ) {
71 .addReg(FrameReg)
78 .addReg(FrameReg)
84 .addReg(FrameReg)
94 unsigned Reg, unsigned FrameReg,
107 .addReg(FrameReg)
114 .addReg(FrameReg)
120 .addReg(FrameReg)
288 unsigned FrameReg = getFrameRegister(MF);
292 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.h | 65 unsigned &FrameReg) const override;
|
| X86FrameLowering.cpp | [all...] |
| X86FastISel.cpp | [all...] |
| /external/llvm/include/llvm/Target/ |
| TargetFrameLowering.h | 198 /// returned directly, and the base register is returned via FrameReg.
200 unsigned &FrameReg) const;
|
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfUnit.cpp | [all...] |
