| /external/webrtc/src/common_audio/signal_processing/ |
| spl_sqrt_floor.s | 23 adc r2, r1, r2, lsl #1
27 adc r2, r1, r2, lsl #1
31 adc r2, r1, r2, lsl #1
35 adc r2, r1, r2, lsl #1
39 adc r2, r1, r2, lsl #1
43 adc r2, r1, r2, lsl #1
47 adc r2, r1, r2, lsl #1
51 adc r2, r1, r2, lsl #1
55 adc r2, r1, r2, lsl #1
59 adc r2, r1, r2, lsl #
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-large-frame.ll | 14 ; CHECK: sub sp, sp, #4095, lsl #12
15 ; CHECK: sub sp, sp, #4095, lsl #12
16 ; CHECK: sub sp, sp, #1575, lsl #12
21 ; CHECK: add [[TMP:x[0-9]+]], sp, #4095, lsl #12
22 ; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #787, lsl #12
29 ; CHECK: add [[TMP:x[0-9]+]], sp, #4095, lsl #12
30 ; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #787, lsl #12
42 ; CHECK: add sp, sp, #4095, lsl #12
43 ; CHECK: add sp, sp, #4095, lsl #12
44 ; CHECK: add sp, sp, #1575, lsl #1
[all...] |
| mul_pow2.ll | 8 ; CHECK: lsl w0, w0, #1
16 ; CHECK: add w0, w0, w0, lsl #1
24 ; CHECK: lsl w0, w0, #2
32 ; CHECK: add w0, w0, w0, lsl #2
41 ; CHECK: lsl {{w[0-9]+}}, w0, #3
50 ; CHECK: lsl w0, w0, #3
58 ; CHECK: add w0, w0, w0, lsl #3
69 ; CHECK: neg w0, w0, lsl #1
77 ; CHECK: add {{w[0-9]+}}, w0, w0, lsl #1
86 ; CHECK:neg w0, w0, lsl #
[all...] |
| arm64-big-stack.ll | 10 ; CHECK: sub sp, sp, #4095, lsl #12
11 ; CHECK: sub sp, sp, #4095, lsl #12
12 ; CHECK: sub sp, sp, #2, lsl #12
|
| /external/llvm/test/CodeGen/ARM/ |
| mul_const.ll | 6 ; CHECK: add r0, r0, r0, lsl #3
14 ; CHECK: rsb r0, r0, r0, lsl #3
22 ; CHECK: add r0, r0, r0, lsl #2
30 ; CHECK: add r0, r0, r0, lsl #1
38 ; CHECK: add r0, r0, r0, lsl #1
39 ; CHECK: lsl{{.*}}#12
47 ; CHECK: add r0, r0, r0, lsl #3
56 ; CHECK: sub r0, r0, r0, lsl #3
64 ; CHECK: add r0, r0, r0, lsl #2
73 ; CHECK: sub r0, r0, r0, lsl #
[all...] |
| shifter_operand.ll | 8 ; A8: add r0, r0, r1, lsl r2
11 ; A9: add r0, r0, r1, lsl r2
34 ; A8: ldr r0, [r0, r2, lsl #2]
35 ; A8: ldr r1, [r1, r2, lsl #2]
37 ; lsl #2 is free
39 ; A9: ldr r0, [r0, r2, lsl #2]
40 ; A9: ldr r1, [r1, r2, lsl #2]
57 ; A8: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2]
58 ; A8-NOT: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2]!
59 ; A8: str [[REG]], [r0, r1, lsl #2
[all...] |
| mul.ll | 21 ; CHECK: lsl
30 ; CHECK: lsl
31 ; CHECK-NOT: lsl
|
| /external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
| spl_sqrt_floor_arm.S | 47 adc r2, r1, r2, lsl #1
51 adc r2, r1, r2, lsl #1
55 adc r2, r1, r2, lsl #1
59 adc r2, r1, r2, lsl #1
63 adc r2, r1, r2, lsl #1
67 adc r2, r1, r2, lsl #1
71 adc r2, r1, r2, lsl #1
75 adc r2, r1, r2, lsl #1
79 adc r2, r1, r2, lsl #1
83 adc r2, r1, r2, lsl #
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV5E/ |
| Deemph_32_opt.s | 44 MOV r10, r6, LSL #16 @L_tmp = x_hi[0]<<16
47 ADD r12, r10, r7, LSL #4 @L_tmp += x_lo[0] << 4
48 MOV r10, r12, LSL #3 @L_tmp <<= 3
53 MOV r12, r10, LSL #1 @L_tmp = L_mac(L_tmp, *mem, fac)
58 MOV r10, r6, LSL #16
59 ADD r12, r10, r7, LSL #4
61 MOV r10, r12, LSL #3
64 MOV r12, r10, LSL #1
72 MOV r10, r6, LSL #16
73 ADD r12, r10, r7, LSL #
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Deemph_32_neon.s | 44 MOV r10, r6, LSL #16 @L_tmp = x_hi[0]<<16
47 ADD r12, r10, r7, LSL #4 @L_tmp += x_lo[0] << 4
48 MOV r10, r12, LSL #3 @L_tmp <<= 3
53 MOV r12, r10, LSL #1 @L_tmp = L_mac(L_tmp, *mem, fac)
58 MOV r10, r6, LSL #16
59 ADD r12, r10, r7, LSL #4
61 MOV r10, r12, LSL #3
64 MOV r12, r10, LSL #1
72 MOV r10, r6, LSL #16
73 ADD r12, r10, r7, LSL #
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/arm/armv6/ |
| intra4x4_predict_v6.asm | 37 addlt pc, pc, r3, lsl #2 ; position independent switch
69 add r12, r12, r12, lsl #8
71 add r12, r12, r12, lsl #16
91 add r9, r9, r9, lsl #16 ; [tl|tl]
97 add r4, r4, r4, lsl #16 ; l[0|0]
98 add r5, r5, r5, lsl #16 ; l[1|1]
99 add r6, r6, r6, lsl #16 ; l[2|2]
100 add r7, r7, r7, lsl #16 ; l[3|3]
110 add r12, r1, r2, lsl #8 ; [3|2|1|0]
119 add r12, r4, r5, lsl #8 ; [3|2|1|0
[all...] |
| dequant_idct_v6.asm | 69 pkhbt r7, r7, r9, lsl #16
71 pkhbt r8, r8, r10, lsl #16
77 pkhbt r9, r9, r11, lsl #16
79 pkhbt r10, r10, r7, lsl #16
107 pkhbt r11, r8, r6, lsl #16
108 pkhbt r1, lr, r1, lsl #16
109 pkhbt r12, r10, r12, lsl #16
112 pkhbt lr, r9, r7, lsl #16
121 pkhbt r1, r7, r1, lsl #16
123 pkhbt r11, r9, r11, lsl #1
[all...] |
| /external/libvpx/libvpx/vp8/common/arm/armv6/ |
| intra4x4_predict_v6.asm | 37 addlt pc, pc, r3, lsl #2 ; position independent switch
69 add r12, r12, r12, lsl #8
71 add r12, r12, r12, lsl #16
91 add r9, r9, r9, lsl #16 ; [tl|tl]
97 add r4, r4, r4, lsl #16 ; l[0|0]
98 add r5, r5, r5, lsl #16 ; l[1|1]
99 add r6, r6, r6, lsl #16 ; l[2|2]
100 add r7, r7, r7, lsl #16 ; l[3|3]
110 add r12, r1, r2, lsl #8 ; [3|2|1|0]
119 add r12, r4, r5, lsl #8 ; [3|2|1|0
[all...] |
| dequant_idct_v6.asm | 69 pkhbt r7, r7, r9, lsl #16
71 pkhbt r8, r8, r10, lsl #16
77 pkhbt r9, r9, r11, lsl #16
79 pkhbt r10, r10, r7, lsl #16
107 pkhbt r11, r8, r6, lsl #16
108 pkhbt r1, lr, r1, lsl #16
109 pkhbt r12, r10, r12, lsl #16
112 pkhbt lr, r9, r7, lsl #16
121 pkhbt r1, r7, r1, lsl #16
123 pkhbt r11, r9, r11, lsl #1
[all...] |
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/arm/armv6/ |
| intra4x4_predict_v6.asm | 37 addlt pc, pc, r3, lsl #2 ; position independent switch
69 add r12, r12, r12, lsl #8
71 add r12, r12, r12, lsl #16
91 add r9, r9, r9, lsl #16 ; [tl|tl]
97 add r4, r4, r4, lsl #16 ; l[0|0]
98 add r5, r5, r5, lsl #16 ; l[1|1]
99 add r6, r6, r6, lsl #16 ; l[2|2]
100 add r7, r7, r7, lsl #16 ; l[3|3]
110 add r12, r1, r2, lsl #8 ; [3|2|1|0]
119 add r12, r4, r5, lsl #8 ; [3|2|1|0
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 34 ADD pc,pc,r12,LSL #2
56 ORR r4,r4,r5,LSL #24
59 ORR r8,r8,r9,LSL #24
66 ORR r4,r4,r5,LSL #24
69 ORR r8,r8,r9,LSL #24
78 ORR r4,r4,r5,LSL #16
81 ORR r8,r8,r9,LSL #16
88 ORR r4,r4,r5,LSL #16
91 ORR r8,r8,r9,LSL #16
100 ORR r4,r4,r5,LSL #
[all...] |
| omxVCM4P10_InterpolateLuma_s.S | 38 ADD r6,r6,r7,LSL #2
44 ADD pc,pc,r6,LSL #2
63 ADD r12,r0,r1,LSL #1
68 ADD r12,r2,r3,LSL #1
82 ADD r12,r2,r3,LSL #1
92 ADD r12,r2,r3,LSL #1
106 ADD r12,r2,r3,LSL #1
114 SUB r0,r0,r1,LSL #1
120 ADD r12,r2,r3,LSL #1
129 SUB r0,r0,r1,LSL #
[all...] |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.S | 34 ADD pc,pc,r7,LSL #2
52 ORR r7,r7,r10,LSL #24
54 ORR r10,r10,r11,LSL #24
64 ORR r7,r7,r10,LSL #16
66 ORR r10,r10,r11,LSL #16
76 ORR r7,r7,r10,LSL #8
78 ORR r10,r10,r11,LSL #8
93 ADD pc,pc,r7,LSL #2
109 LSL r10,r10,#24
118 LSL r10,r10,#1
[all...] |
| /frameworks/av/media/libstagefright/codecs/aacenc/src/asm/ARMV5E/ |
| band_nrg_v5.s | 31 mov r2, r2, lsl #16
40 mov r2, r4, lsl #1
49 ldr r11, [r0, +r10, lsl #2]
51 ldr r6, [r0, +r10, lsl #2]
55 ldr r11, [r0, +r10, lsl #2]
59 ldr r6, [r0, +r10, lsl #2]
70 str r14, [r3, +r4, lsl #2]
90 mov r3, r3, lsl #16
98 mov r5, r4, lsl #1
113 ldr r8, [r0, +r10, lsl #2
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.s | 92 ORR x0, x0, x1, LSL #24
95 ORR x2, x2, x3, LSL #24
102 ORR x0, x0, x1, LSL #24
105 ORR x2, x2, x3, LSL #24
115 ORR x0, x0, x1, LSL #16
118 ORR x2, x2, x3, LSL #16
126 ORR x0, x0, x1, LSL #16
129 ORR x2, x2, x3, LSL #16
139 ORR x0, x0, x1, LSL #8
142 ORR x2, x2, x3, LSL #
[all...] |
| armVCM4P10_InterpolateLuma_HalfHor4x4_unsafe_s.s | 110 PKHBT ValB, ValA, ValD, LSL #16 ;// [b1 a1 b0 a0]
114 PKHBT ValI, Temp1, Temp2, LSL #16 ;// [00 i1 00 i0]
115 PKHBT ValF, ValE, ValH, LSL #16 ;// [f1 e1 f0 e0]
123 RSB Temp1, Temp3, Temp1, LSL #2
125 ADD Temp1, Temp1, Temp1, LSL #2
132 RSB Temp1, Temp3, Temp1, LSL #2
134 ADD Temp1, Temp1, Temp1, LSL #2
153 ORR Acc0, Acc0, Acc1, LSL #8
154 RSB Temp5, Temp1, Temp2, LSL #2
156 ADD Temp5, Temp5, Temp5, LSL #2
[all...] |
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.s | 92 ORR x0, x0, x1, LSL #24
95 ORR x2, x2, x3, LSL #24
102 ORR x0, x0, x1, LSL #24
105 ORR x2, x2, x3, LSL #24
115 ORR x0, x0, x1, LSL #16
118 ORR x2, x2, x3, LSL #16
126 ORR x0, x0, x1, LSL #16
129 ORR x2, x2, x3, LSL #16
139 ORR x0, x0, x1, LSL #8
142 ORR x2, x2, x3, LSL #
[all...] |
| /external/llvm/test/CodeGen/Thumb2/ |
| mul_const.ll | 7 ; CHECK: add.w r0, r0, r0, lsl #3
15 ; CHECK: rsb r0, r0, r0, lsl #3
|
| /external/llvm/test/MC/AArch64/ |
| arm64-optional-hash.s | 8 ; CHECK: adds x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0xb1]
9 adds x3, x4, 1024, lsl 12
30 ; CHECK: prfm pstl3strm, [x4, x5, lsl #3] ; encoding: [0x95,0x78,0xa5,0xf8]
31 prfm pstl3strm, [x4, x5, lsl 3]
|
| neon-mov.s | 11 movi v15.2s, #1, lsl #8
12 movi v16.2s, #1, lsl #16
13 movi v31.2s, #1, lsl #24
15 movi v0.4s, #1, lsl #8
16 movi v0.4s, #1, lsl #16
17 movi v0.4s, #1, lsl #24
19 movi v0.4h, #1, lsl #8
21 movi v0.8h, #1, lsl #8
25 // CHECK: movi v15.2s, #{{0x1|1}}, lsl #8 // encoding: [0x2f,0x24,0x00,0x0f]
26 // CHECK: movi v16.2s, #{{0x1|1}}, lsl #16 // encoding: [0x30,0x44,0x00,0x0f
[all...] |
