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  /external/llvm/test/CodeGen/Mips/msa/
elm_copy.ll 4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | \
5 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32
7 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS32
9 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS64
11 ; RUN: FileCheck %s -check-prefix=MIPS-ANY -check-prefix=MIPS64
19 %1 = tail call i32 @llvm.mips.copy.s.b(<16 x i8> %0, i32 1)
24 declare i32 @llvm.mips.copy.s.b(<16 x i8>, i32) nounwind
26 ; MIPS-ANY: llvm_mips_copy_s_b_test:
29 ; MIPS-ANY-DAG: ld.b [[WS:\$w[0-9]+]], 0([[R1]])
30 ; MIPS-ANY-DAG: copy_s.b [[RD:\$[0-9]+]], [[WS]][1
    [all...]
elm_cxcmsa.ll 4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
9 %0 = tail call i32 @llvm.mips.cfcmsa(i32 0)
19 %0 = tail call i32 @llvm.mips.cfcmsa(i32 1)
29 %0 = tail call i32 @llvm.mips.cfcmsa(i32 2)
39 %0 = tail call i32 @llvm.mips.cfcmsa(i32 3)
49 %0 = tail call i32 @llvm.mips.cfcmsa(i32 4)
59 %0 = tail call i32 @llvm.mips.cfcmsa(i32 5)
69 %0 = tail call i32 @llvm.mips.cfcmsa(i32 6)
79 %0 = tail call i32 @llvm.mips.cfcmsa(i32 7)
89 tail call void @llvm.mips.ctcmsa(i32 0, i32 1
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  /external/clang/test/Driver/
mips-features.c 1 // Check handling MIPS specific features options.
4 // RUN: %clang -target mips-linux-gnu -### -c %s \
10 // RUN: %clang -target mips-linux-gnu -### -c %s \
16 // RUN: %clang -target mips-linux-gnu -### -c %s \
22 // RUN: %clang -target mips-linux-gnu -### -c %s \
28 // RUN: %clang -target mips-linux-gnu -### -c %s \
34 // RUN: %clang -target mips-linux-gnu -### -c %s \
40 // RUN: %clang -target mips-linux-gnu -### -c %s \
46 // RUN: %clang -target mips-linux-gnu -### -c %s \
52 // RUN: %clang -target mips-linux-gnu -### -c %s
    [all...]
freebsd-mips-as.c 1 // Check passing options to the assembler for MIPS targets.
3 // RUN: %clang -target mips-unknown-freebsd -### \
9 // RUN: %clang -target mips-unknown-freebsd -### \
15 // RUN: %clang -target mips-unknown-freebsd -### \
21 // RUN: %clang -target mips-unknown-freebsd -### \
27 // RUN: %clang -target mips-unknown-freebsd -### \
48 // RUN: %clang -target mips-unknown-freebsd -mabi=eabi -### \
50 // RUN: | FileCheck -check-prefix=MIPS-EABI %s
51 // MIPS-EABI: as{{(.exe)?}}" "-march" "mips32r2" "-mabi" "eabi" "-EB"
55 // RUN: | FileCheck -check-prefix=MIPS-N32 %
    [all...]
  /external/llvm/lib/Target/Mips/
Mips16ISelLowering.cpp 25 #define DEBUG_TYPE "mips-lower"
31 "pseudos for Mips 16"),
125 addRegisterClass(MVT::i32, &Mips::CPU16RegsRegClass);
170 case Mips::SelBeqZ:
171 return emitSel16(Mips::BeqzRxImm16, MI, BB);
172 case Mips::SelBneZ:
173 return emitSel16(Mips::BnezRxImm16, MI, BB);
174 case Mips::SelTBteqZCmpi:
175 return emitSeliT16(Mips::Bteqz16, Mips::CmpiRxImmX16, MI, BB)
    [all...]
MipsSERegisterInfo.cpp 16 #include "Mips.h"
42 #define DEBUG_TYPE "mips-reg-info"
60 return &Mips::GPR32RegClass;
63 return &Mips::GPR64RegClass;
71 case Mips::LD_B:
72 case Mips::ST_B:
74 case Mips::LD_H:
75 case Mips::ST_H:
77 case Mips::LD_W:
78 case Mips::ST_W
    [all...]
MipsFastISel.cpp 1 //===-- MipsastISel.cpp - Mips FastISel implementation
163 ResultReg = createResultReg(&Mips::GPR32RegClass);
164 Opc = Mips::LW;
168 ResultReg = createResultReg(&Mips::GPR32RegClass);
169 Opc = Mips::LHu;
173 ResultReg = createResultReg(&Mips::GPR32RegClass);
174 Opc = Mips::LBu;
178 ResultReg = createResultReg(&Mips::FGR32RegClass);
179 Opc = Mips::LWC1;
183 ResultReg = createResultReg(&Mips::AFGR64RegClass)
    [all...]
MipsLongBranch.cpp 16 #include "Mips.h"
32 #define DEBUG_TYPE "mips-long-branch"
37 "skip-mips-long-branch",
39 cl::desc("MIPS: Skip long branch pass."),
43 "force-mips-long-branch",
45 cl::desc("MIPS: Expand all branches to long format."),
72 return "Mips Long Branch";
274 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR;
293 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP
    [all...]
  /external/llvm/test/CodeGen/Mips/
dsp-r1.ll 7 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 15)
11 declare i32 @llvm.mips.extr.w(i64, i32) nounwind
17 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 %a1)
25 %1 = tail call i32 @llvm.mips.extr.r.w(i64 %a0, i32 15)
29 declare i32 @llvm.mips.extr.r.w(i64, i32) nounwind
35 %1 = tail call i32 @llvm.mips.extr.s.h(i64 %a0, i32 %a1)
39 declare i32 @llvm.mips.extr.s.h(i64, i32) nounwind
45 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 15)
49 declare i32 @llvm.mips.extr.rs.w(i64, i32) nounwind
55 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 %a1
    [all...]
2008-08-07-CC.ll 1 ; RUN: llc < %s -march=mips
2 ; Mips must ignore fastcc
  /external/llvm/lib/Target/Mips/TargetInfo/
MipsTargetInfo.cpp 1 //===-- MipsTargetInfo.cpp - Mips Target Implementation -------------------===//
10 #include "Mips.h"
19 RegisterTarget<Triple::mips,
20 /*HasJIT=*/true> X(TheMipsTarget, "mips", "Mips");
  /external/llvm/test/MC/Mips/
elf-objdump.s 2 // RUN: llvm-mc -filetype=obj -triple mips-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s
4 // RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s
6 // RUN: llvm-mc -filetype=obj -arch=mips64 -triple mips64-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s
8 // RUN: llvm-mc -filetype=obj -arch=mips64el -triple mips64el-unknown-linux %s -o - | llvm-objdump -d -triple mips-unknown-linux - | FileCheck %s
  /cts/hostsidetests/appsecurity/test-apps/SplitApp/libs/mips/raw/lib/mips/
libsplitappjni.so 
  /device/generic/mips/
mini_mips.mk 18 PRODUCT_DEVICE := mips
20 PRODUCT_MODEL := Mini for mips
23 DEVICE_PACKAGE_OVERLAYS := device/generic/mips/overlay
  /external/srec/make/asr/
Makefile.config 26 ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
27 ASR_CPU = MIPS
28 ASR_TARGET_CPU = MIPS
  /frameworks/compile/mclinker/
Android.mk 32 # MIPS Code Generation Libraries
34 lib/Target/Mips \
35 lib/Target/Mips/TargetInfo
  /ndk/docs/text/
CPU-MIPS.text 7 Android NDK r8 added support for the 'mips' ABI, that allows native code to
11 The Android 'mips' ABI itself is fully specified in d/CPU-ARCH-ABIS.
16 Generating mips machine code is simple: just add 'mips' to your APP_ABI
19 APP_ABI := armeabi armeabi-v7a mips
30 As you would expect, generated libraries will go into $PROJECT/libs/mips/, and
31 will be embedded into your .apk under /lib/mips/.
34 libraries on a *compatible* mips-based device automatically at install time,
46 It is possible to use the mips toolchain with NDK r8 in stand-alone mode.
50 $NDK/build/tools/make-standalone-toolchain.sh --arch=mips --install-dir=<path
    [all...]
  /external/libvpx/mips-dspr2/
libvpx_srcs.txt 35 vp8/common/mips/dspr2/dequantize_dspr2.c
36 vp8/common/mips/dspr2/filter_dspr2.c
37 vp8/common/mips/dspr2/idct_blk_dspr2.c
38 vp8/common/mips/dspr2/idctllm_dspr2.c
39 vp8/common/mips/dspr2/loopfilter_filters_dspr2.c
40 vp8/common/mips/dspr2/reconinter_dspr2.c
132 vp9/common/mips/dspr2/vp9_common_dspr2.h
133 vp9/common/mips/dspr2/vp9_convolve2_avg_dspr2.c
134 vp9/common/mips/dspr2/vp9_convolve2_avg_horiz_dspr2.c
135 vp9/common/mips/dspr2/vp9_convolve2_dspr2.
    [all...]
  /hardware/intel/common/omx-components/videocodec/libvpx_internal/mips-dspr2/
libvpx_srcs.txt 35 vp8/common/mips/dspr2/dequantize_dspr2.c
36 vp8/common/mips/dspr2/filter_dspr2.c
37 vp8/common/mips/dspr2/idct_blk_dspr2.c
38 vp8/common/mips/dspr2/idctllm_dspr2.c
39 vp8/common/mips/dspr2/loopfilter_filters_dspr2.c
40 vp8/common/mips/dspr2/reconinter_dspr2.c
135 vp9/common/mips/dspr2/vp9_common_dspr2.h
136 vp9/common/mips/dspr2/vp9_convolve2_avg_dspr2.c
137 vp9/common/mips/dspr2/vp9_convolve2_avg_horiz_dspr2.c
138 vp9/common/mips/dspr2/vp9_convolve2_dspr2.
    [all...]
  /external/libvpx/
config.mips.mk 8 libvpx_target := mips-dspr2
10 libvpx_target := mips
  /external/valgrind/main/coregrind/m_gdbserver/
mips64-linux.xml 10 <architecture>mips</architecture>
15 <feature name="org.gnu.gdb.mips.linux">
  /external/valgrind/main/exp-sgcheck/tests/
is_arch_supported 4 # MIPS and ARM are not supported and will fail these tests as follows:
13 ppc*|arm*|s390x|mips*) exit 1;;
  /ndk/tests/build/issue36131-flto-c++11/jni/
Android.mk 10 ifeq ($(TARGET_ARCH_ABI),mips)
11 # clang does LTO via gold plugin, but gold doesn't support MIPS yet
  /external/chromium_org/v8/tools/gyp/
v8_base.host.darwin-mips.mk 222 v8/src/mips/assembler-mips.cc \
223 v8/src/mips/builtins-mips.cc \
224 v8/src/mips/codegen-mips.cc \
225 v8/src/mips/code-stubs-mips.cc \
226 v8/src/mips/constants-mips.cc
    [all...]
v8_base.host.linux-mips.mk 222 v8/src/mips/assembler-mips.cc \
223 v8/src/mips/builtins-mips.cc \
224 v8/src/mips/codegen-mips.cc \
225 v8/src/mips/code-stubs-mips.cc \
226 v8/src/mips/constants-mips.cc
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