/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.h | 81 /// BasePtr - ARM physical register used as a base ptr in complex stack 84 unsigned BasePtr; 153 unsigned getBaseRegister() const { return BasePtr; }
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Thumb1FrameLowering.cpp | 104 unsigned BasePtr = RegInfo->getBaseRegister(); 295 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
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ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86RegisterInfo.h | 45 /// BasePtr - X86 physical register used as a base ptr in complex stack 48 unsigned BasePtr; 122 unsigned getBaseRegister() const { return BasePtr; }
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X86RegisterInfo.cpp | 79 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; 84 BasePtr = X86::ESI; 374 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), MVT::i64, 376 for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true); 458 return MRI->canReserveReg(BasePtr); 492 unsigned BasePtr; 497 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); 499 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); 501 BasePtr = StackPtr; 503 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr) [all...] |
X86ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430RegisterInfo.cpp | 116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP); 137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
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/external/llvm/lib/Target/SystemZ/ |
SystemZRegisterInfo.cpp | 72 unsigned BasePtr = getFrameRegister(MF); 78 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); 88 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 110 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 118 .addReg(BasePtr).addImm(HighOffset).addReg(0); 124 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
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/external/clang/lib/AST/ |
CXXInheritance.cpp | 105 const void *BasePtr = static_cast<const void*>(Base->getCanonicalDecl()); 107 const_cast<void *>(BasePtr),
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/external/llvm/lib/Target/PowerPC/ |
PPCLoopPreIncPrep.cpp | 118 static bool IsPtrInBounds(Value *BasePtr) { 119 Value *StrippedBasePtr = BasePtr; 266 Value *BasePtr = GetPointerOperand(MemI); 267 assert(BasePtr && "No pointer operand"); 271 BasePtr->getType()->getPointerAddressSpace()); 309 PtrInc->setIsInBounds(IsPtrInBounds(BasePtr)); 319 if (PtrInc->getType() != BasePtr->getType()) 320 NewBasePtr = new BitCastInst(PtrInc, BasePtr->getType(), 325 if (Instruction *IDel = dyn_cast<Instruction>(BasePtr)) 327 BasePtr->replaceAllUsesWith(NewBasePtr) [all...] |
PPCISelLowering.cpp | [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
SIISelLowering.cpp | 348 ConstantSDNode *BasePtr = dyn_cast<ConstantSDNode>(Ptr->getBasePtr()); 349 assert(BasePtr); 364 uint64_t Index = BasePtr->getZExtValue();
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/external/llvm/lib/Transforms/Scalar/ |
LoopIdiomRecognize.cpp | [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.cpp | 384 SDValue BasePtr = DAG.getCopyFromReg(Chain, SL, 386 SDValue Ptr = DAG.getNode(ISD::ADD, SL, MVT::i64, BasePtr, [all...] |
AMDGPUISelLowering.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 444 SDValue BasePtr = LD->getBasePtr(); 450 if (DAG.isBaseWithConstantOffset(BasePtr) && 451 isWordAligned(BasePtr->getOperand(0), DAG)) { 452 SDValue NewBasePtr = BasePtr->getOperand(0); 453 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue(); 457 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) && 460 BasePtr->getValueType(0)); 468 BasePtr, LD->getPointerInfo(), MVT::i16, 471 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, 487 // Lower to a call to __misaligned_load(BasePtr) [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
BitcodeReader.cpp | [all...] |
/external/clang/lib/CodeGen/ |
CGClass.cpp | 629 llvm::Type *BasePtr = ConvertType(BaseElementTy); 630 BasePtr = llvm::PointerType::getUnqual(BasePtr); 632 BasePtr); [all...] |
/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |