1 //===- lib/CodeGen/MachineTraceMetrics.cpp ----------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include "llvm/CodeGen/MachineTraceMetrics.h" 11 #include "llvm/ADT/PostOrderIterator.h" 12 #include "llvm/ADT/SparseSet.h" 13 #include "llvm/CodeGen/MachineBasicBlock.h" 14 #include "llvm/CodeGen/MachineBranchProbabilityInfo.h" 15 #include "llvm/CodeGen/MachineLoopInfo.h" 16 #include "llvm/CodeGen/MachineRegisterInfo.h" 17 #include "llvm/CodeGen/Passes.h" 18 #include "llvm/MC/MCSubtargetInfo.h" 19 #include "llvm/Support/Debug.h" 20 #include "llvm/Support/Format.h" 21 #include "llvm/Support/raw_ostream.h" 22 #include "llvm/Target/TargetInstrInfo.h" 23 #include "llvm/Target/TargetRegisterInfo.h" 24 #include "llvm/Target/TargetSubtargetInfo.h" 25 26 using namespace llvm; 27 28 #define DEBUG_TYPE "machine-trace-metrics" 29 30 char MachineTraceMetrics::ID = 0; 31 char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID; 32 33 INITIALIZE_PASS_BEGIN(MachineTraceMetrics, 34 "machine-trace-metrics", "Machine Trace Metrics", false, true) 35 INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo) 36 INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) 37 INITIALIZE_PASS_END(MachineTraceMetrics, 38 "machine-trace-metrics", "Machine Trace Metrics", false, true) 39 40 MachineTraceMetrics::MachineTraceMetrics() 41 : MachineFunctionPass(ID), MF(nullptr), TII(nullptr), TRI(nullptr), 42 MRI(nullptr), Loops(nullptr) { 43 std::fill(std::begin(Ensembles), std::end(Ensembles), nullptr); 44 } 45 46 void MachineTraceMetrics::getAnalysisUsage(AnalysisUsage &AU) const { 47 AU.setPreservesAll(); 48 AU.addRequired<MachineBranchProbabilityInfo>(); 49 AU.addRequired<MachineLoopInfo>(); 50 MachineFunctionPass::getAnalysisUsage(AU); 51 } 52 53 bool MachineTraceMetrics::runOnMachineFunction(MachineFunction &Func) { 54 MF = &Func; 55 const TargetSubtargetInfo &ST = MF->getSubtarget(); 56 TII = ST.getInstrInfo(); 57 TRI = ST.getRegisterInfo(); 58 MRI = &MF->getRegInfo(); 59 Loops = &getAnalysis<MachineLoopInfo>(); 60 SchedModel.init(ST.getSchedModel(), &ST, TII); 61 BlockInfo.resize(MF->getNumBlockIDs()); 62 ProcResourceCycles.resize(MF->getNumBlockIDs() * 63 SchedModel.getNumProcResourceKinds()); 64 return false; 65 } 66 67 void MachineTraceMetrics::releaseMemory() { 68 MF = nullptr; 69 BlockInfo.clear(); 70 for (unsigned i = 0; i != TS_NumStrategies; ++i) { 71 delete Ensembles[i]; 72 Ensembles[i] = nullptr; 73 } 74 } 75 76 //===----------------------------------------------------------------------===// 77 // Fixed block information 78 //===----------------------------------------------------------------------===// 79 // 80 // The number of instructions in a basic block and the CPU resources used by 81 // those instructions don't depend on any given trace strategy. 82 83 /// Compute the resource usage in basic block MBB. 84 const MachineTraceMetrics::FixedBlockInfo* 85 MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) { 86 assert(MBB && "No basic block"); 87 FixedBlockInfo *FBI = &BlockInfo[MBB->getNumber()]; 88 if (FBI->hasResources()) 89 return FBI; 90 91 // Compute resource usage in the block. 92 FBI->HasCalls = false; 93 unsigned InstrCount = 0; 94 95 // Add up per-processor resource cycles as well. 96 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); 97 SmallVector<unsigned, 32> PRCycles(PRKinds); 98 99 for (const auto &MI : *MBB) { 100 if (MI.isTransient()) 101 continue; 102 ++InstrCount; 103 if (MI.isCall()) 104 FBI->HasCalls = true; 105 106 // Count processor resources used. 107 if (!SchedModel.hasInstrSchedModel()) 108 continue; 109 const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI); 110 if (!SC->isValid()) 111 continue; 112 113 for (TargetSchedModel::ProcResIter 114 PI = SchedModel.getWriteProcResBegin(SC), 115 PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) { 116 assert(PI->ProcResourceIdx < PRKinds && "Bad processor resource kind"); 117 PRCycles[PI->ProcResourceIdx] += PI->Cycles; 118 } 119 } 120 FBI->InstrCount = InstrCount; 121 122 // Scale the resource cycles so they are comparable. 123 unsigned PROffset = MBB->getNumber() * PRKinds; 124 for (unsigned K = 0; K != PRKinds; ++K) 125 ProcResourceCycles[PROffset + K] = 126 PRCycles[K] * SchedModel.getResourceFactor(K); 127 128 return FBI; 129 } 130 131 ArrayRef<unsigned> 132 MachineTraceMetrics::getProcResourceCycles(unsigned MBBNum) const { 133 assert(BlockInfo[MBBNum].hasResources() && 134 "getResources() must be called before getProcResourceCycles()"); 135 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); 136 assert((MBBNum+1) * PRKinds <= ProcResourceCycles.size()); 137 return makeArrayRef(ProcResourceCycles.data() + MBBNum * PRKinds, PRKinds); 138 } 139 140 141 //===----------------------------------------------------------------------===// 142 // Ensemble utility functions 143 //===----------------------------------------------------------------------===// 144 145 MachineTraceMetrics::Ensemble::Ensemble(MachineTraceMetrics *ct) 146 : MTM(*ct) { 147 BlockInfo.resize(MTM.BlockInfo.size()); 148 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); 149 ProcResourceDepths.resize(MTM.BlockInfo.size() * PRKinds); 150 ProcResourceHeights.resize(MTM.BlockInfo.size() * PRKinds); 151 } 152 153 // Virtual destructor serves as an anchor. 154 MachineTraceMetrics::Ensemble::~Ensemble() {} 155 156 const MachineLoop* 157 MachineTraceMetrics::Ensemble::getLoopFor(const MachineBasicBlock *MBB) const { 158 return MTM.Loops->getLoopFor(MBB); 159 } 160 161 // Update resource-related information in the TraceBlockInfo for MBB. 162 // Only update resources related to the trace above MBB. 163 void MachineTraceMetrics::Ensemble:: 164 computeDepthResources(const MachineBasicBlock *MBB) { 165 TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()]; 166 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); 167 unsigned PROffset = MBB->getNumber() * PRKinds; 168 169 // Compute resources from trace above. The top block is simple. 170 if (!TBI->Pred) { 171 TBI->InstrDepth = 0; 172 TBI->Head = MBB->getNumber(); 173 std::fill(ProcResourceDepths.begin() + PROffset, 174 ProcResourceDepths.begin() + PROffset + PRKinds, 0); 175 return; 176 } 177 178 // Compute from the block above. A post-order traversal ensures the 179 // predecessor is always computed first. 180 unsigned PredNum = TBI->Pred->getNumber(); 181 TraceBlockInfo *PredTBI = &BlockInfo[PredNum]; 182 assert(PredTBI->hasValidDepth() && "Trace above has not been computed yet"); 183 const FixedBlockInfo *PredFBI = MTM.getResources(TBI->Pred); 184 TBI->InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount; 185 TBI->Head = PredTBI->Head; 186 187 // Compute per-resource depths. 188 ArrayRef<unsigned> PredPRDepths = getProcResourceDepths(PredNum); 189 ArrayRef<unsigned> PredPRCycles = MTM.getProcResourceCycles(PredNum); 190 for (unsigned K = 0; K != PRKinds; ++K) 191 ProcResourceDepths[PROffset + K] = PredPRDepths[K] + PredPRCycles[K]; 192 } 193 194 // Update resource-related information in the TraceBlockInfo for MBB. 195 // Only update resources related to the trace below MBB. 196 void MachineTraceMetrics::Ensemble:: 197 computeHeightResources(const MachineBasicBlock *MBB) { 198 TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()]; 199 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); 200 unsigned PROffset = MBB->getNumber() * PRKinds; 201 202 // Compute resources for the current block. 203 TBI->InstrHeight = MTM.getResources(MBB)->InstrCount; 204 ArrayRef<unsigned> PRCycles = MTM.getProcResourceCycles(MBB->getNumber()); 205 206 // The trace tail is done. 207 if (!TBI->Succ) { 208 TBI->Tail = MBB->getNumber(); 209 std::copy(PRCycles.begin(), PRCycles.end(), 210 ProcResourceHeights.begin() + PROffset); 211 return; 212 } 213 214 // Compute from the block below. A post-order traversal ensures the 215 // predecessor is always computed first. 216 unsigned SuccNum = TBI->Succ->getNumber(); 217 TraceBlockInfo *SuccTBI = &BlockInfo[SuccNum]; 218 assert(SuccTBI->hasValidHeight() && "Trace below has not been computed yet"); 219 TBI->InstrHeight += SuccTBI->InstrHeight; 220 TBI->Tail = SuccTBI->Tail; 221 222 // Compute per-resource heights. 223 ArrayRef<unsigned> SuccPRHeights = getProcResourceHeights(SuccNum); 224 for (unsigned K = 0; K != PRKinds; ++K) 225 ProcResourceHeights[PROffset + K] = SuccPRHeights[K] + PRCycles[K]; 226 } 227 228 // Check if depth resources for MBB are valid and return the TBI. 229 // Return NULL if the resources have been invalidated. 230 const MachineTraceMetrics::TraceBlockInfo* 231 MachineTraceMetrics::Ensemble:: 232 getDepthResources(const MachineBasicBlock *MBB) const { 233 const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()]; 234 return TBI->hasValidDepth() ? TBI : nullptr; 235 } 236 237 // Check if height resources for MBB are valid and return the TBI. 238 // Return NULL if the resources have been invalidated. 239 const MachineTraceMetrics::TraceBlockInfo* 240 MachineTraceMetrics::Ensemble:: 241 getHeightResources(const MachineBasicBlock *MBB) const { 242 const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()]; 243 return TBI->hasValidHeight() ? TBI : nullptr; 244 } 245 246 /// Get an array of processor resource depths for MBB. Indexed by processor 247 /// resource kind, this array contains the scaled processor resources consumed 248 /// by all blocks preceding MBB in its trace. It does not include instructions 249 /// in MBB. 250 /// 251 /// Compare TraceBlockInfo::InstrDepth. 252 ArrayRef<unsigned> 253 MachineTraceMetrics::Ensemble:: 254 getProcResourceDepths(unsigned MBBNum) const { 255 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); 256 assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size()); 257 return makeArrayRef(ProcResourceDepths.data() + MBBNum * PRKinds, PRKinds); 258 } 259 260 /// Get an array of processor resource heights for MBB. Indexed by processor 261 /// resource kind, this array contains the scaled processor resources consumed 262 /// by this block and all blocks following it in its trace. 263 /// 264 /// Compare TraceBlockInfo::InstrHeight. 265 ArrayRef<unsigned> 266 MachineTraceMetrics::Ensemble:: 267 getProcResourceHeights(unsigned MBBNum) const { 268 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); 269 assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size()); 270 return makeArrayRef(ProcResourceHeights.data() + MBBNum * PRKinds, PRKinds); 271 } 272 273 //===----------------------------------------------------------------------===// 274 // Trace Selection Strategies 275 //===----------------------------------------------------------------------===// 276 // 277 // A trace selection strategy is implemented as a sub-class of Ensemble. The 278 // trace through a block B is computed by two DFS traversals of the CFG 279 // starting from B. One upwards, and one downwards. During the upwards DFS, 280 // pickTracePred() is called on the post-ordered blocks. During the downwards 281 // DFS, pickTraceSucc() is called in a post-order. 282 // 283 284 // We never allow traces that leave loops, but we do allow traces to enter 285 // nested loops. We also never allow traces to contain back-edges. 286 // 287 // This means that a loop header can never appear above the center block of a 288 // trace, except as the trace head. Below the center block, loop exiting edges 289 // are banned. 290 // 291 // Return true if an edge from the From loop to the To loop is leaving a loop. 292 // Either of To and From can be null. 293 static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To) { 294 return From && !From->contains(To); 295 } 296 297 // MinInstrCountEnsemble - Pick the trace that executes the least number of 298 // instructions. 299 namespace { 300 class MinInstrCountEnsemble : public MachineTraceMetrics::Ensemble { 301 const char *getName() const override { return "MinInstr"; } 302 const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) override; 303 const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) override; 304 305 public: 306 MinInstrCountEnsemble(MachineTraceMetrics *mtm) 307 : MachineTraceMetrics::Ensemble(mtm) {} 308 }; 309 } 310 311 // Select the preferred predecessor for MBB. 312 const MachineBasicBlock* 313 MinInstrCountEnsemble::pickTracePred(const MachineBasicBlock *MBB) { 314 if (MBB->pred_empty()) 315 return nullptr; 316 const MachineLoop *CurLoop = getLoopFor(MBB); 317 // Don't leave loops, and never follow back-edges. 318 if (CurLoop && MBB == CurLoop->getHeader()) 319 return nullptr; 320 unsigned CurCount = MTM.getResources(MBB)->InstrCount; 321 const MachineBasicBlock *Best = nullptr; 322 unsigned BestDepth = 0; 323 for (MachineBasicBlock::const_pred_iterator 324 I = MBB->pred_begin(), E = MBB->pred_end(); I != E; ++I) { 325 const MachineBasicBlock *Pred = *I; 326 const MachineTraceMetrics::TraceBlockInfo *PredTBI = 327 getDepthResources(Pred); 328 // Ignore cycles that aren't natural loops. 329 if (!PredTBI) 330 continue; 331 // Pick the predecessor that would give this block the smallest InstrDepth. 332 unsigned Depth = PredTBI->InstrDepth + CurCount; 333 if (!Best || Depth < BestDepth) 334 Best = Pred, BestDepth = Depth; 335 } 336 return Best; 337 } 338 339 // Select the preferred successor for MBB. 340 const MachineBasicBlock* 341 MinInstrCountEnsemble::pickTraceSucc(const MachineBasicBlock *MBB) { 342 if (MBB->pred_empty()) 343 return nullptr; 344 const MachineLoop *CurLoop = getLoopFor(MBB); 345 const MachineBasicBlock *Best = nullptr; 346 unsigned BestHeight = 0; 347 for (MachineBasicBlock::const_succ_iterator 348 I = MBB->succ_begin(), E = MBB->succ_end(); I != E; ++I) { 349 const MachineBasicBlock *Succ = *I; 350 // Don't consider back-edges. 351 if (CurLoop && Succ == CurLoop->getHeader()) 352 continue; 353 // Don't consider successors exiting CurLoop. 354 if (isExitingLoop(CurLoop, getLoopFor(Succ))) 355 continue; 356 const MachineTraceMetrics::TraceBlockInfo *SuccTBI = 357 getHeightResources(Succ); 358 // Ignore cycles that aren't natural loops. 359 if (!SuccTBI) 360 continue; 361 // Pick the successor that would give this block the smallest InstrHeight. 362 unsigned Height = SuccTBI->InstrHeight; 363 if (!Best || Height < BestHeight) 364 Best = Succ, BestHeight = Height; 365 } 366 return Best; 367 } 368 369 // Get an Ensemble sub-class for the requested trace strategy. 370 MachineTraceMetrics::Ensemble * 371 MachineTraceMetrics::getEnsemble(MachineTraceMetrics::Strategy strategy) { 372 assert(strategy < TS_NumStrategies && "Invalid trace strategy enum"); 373 Ensemble *&E = Ensembles[strategy]; 374 if (E) 375 return E; 376 377 // Allocate new Ensemble on demand. 378 switch (strategy) { 379 case TS_MinInstrCount: return (E = new MinInstrCountEnsemble(this)); 380 default: llvm_unreachable("Invalid trace strategy enum"); 381 } 382 } 383 384 void MachineTraceMetrics::invalidate(const MachineBasicBlock *MBB) { 385 DEBUG(dbgs() << "Invalidate traces through BB#" << MBB->getNumber() << '\n'); 386 BlockInfo[MBB->getNumber()].invalidate(); 387 for (unsigned i = 0; i != TS_NumStrategies; ++i) 388 if (Ensembles[i]) 389 Ensembles[i]->invalidate(MBB); 390 } 391 392 void MachineTraceMetrics::verifyAnalysis() const { 393 if (!MF) 394 return; 395 #ifndef NDEBUG 396 assert(BlockInfo.size() == MF->getNumBlockIDs() && "Outdated BlockInfo size"); 397 for (unsigned i = 0; i != TS_NumStrategies; ++i) 398 if (Ensembles[i]) 399 Ensembles[i]->verify(); 400 #endif 401 } 402 403 //===----------------------------------------------------------------------===// 404 // Trace building 405 //===----------------------------------------------------------------------===// 406 // 407 // Traces are built by two CFG traversals. To avoid recomputing too much, use a 408 // set abstraction that confines the search to the current loop, and doesn't 409 // revisit blocks. 410 411 namespace { 412 struct LoopBounds { 413 MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> Blocks; 414 SmallPtrSet<const MachineBasicBlock*, 8> Visited; 415 const MachineLoopInfo *Loops; 416 bool Downward; 417 LoopBounds(MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> blocks, 418 const MachineLoopInfo *loops) 419 : Blocks(blocks), Loops(loops), Downward(false) {} 420 }; 421 } 422 423 // Specialize po_iterator_storage in order to prune the post-order traversal so 424 // it is limited to the current loop and doesn't traverse the loop back edges. 425 namespace llvm { 426 template<> 427 class po_iterator_storage<LoopBounds, true> { 428 LoopBounds &LB; 429 public: 430 po_iterator_storage(LoopBounds &lb) : LB(lb) {} 431 void finishPostorder(const MachineBasicBlock*) {} 432 433 bool insertEdge(const MachineBasicBlock *From, const MachineBasicBlock *To) { 434 // Skip already visited To blocks. 435 MachineTraceMetrics::TraceBlockInfo &TBI = LB.Blocks[To->getNumber()]; 436 if (LB.Downward ? TBI.hasValidHeight() : TBI.hasValidDepth()) 437 return false; 438 // From is null once when To is the trace center block. 439 if (From) { 440 if (const MachineLoop *FromLoop = LB.Loops->getLoopFor(From)) { 441 // Don't follow backedges, don't leave FromLoop when going upwards. 442 if ((LB.Downward ? To : From) == FromLoop->getHeader()) 443 return false; 444 // Don't leave FromLoop. 445 if (isExitingLoop(FromLoop, LB.Loops->getLoopFor(To))) 446 return false; 447 } 448 } 449 // To is a new block. Mark the block as visited in case the CFG has cycles 450 // that MachineLoopInfo didn't recognize as a natural loop. 451 return LB.Visited.insert(To).second; 452 } 453 }; 454 } 455 456 /// Compute the trace through MBB. 457 void MachineTraceMetrics::Ensemble::computeTrace(const MachineBasicBlock *MBB) { 458 DEBUG(dbgs() << "Computing " << getName() << " trace through BB#" 459 << MBB->getNumber() << '\n'); 460 // Set up loop bounds for the backwards post-order traversal. 461 LoopBounds Bounds(BlockInfo, MTM.Loops); 462 463 // Run an upwards post-order search for the trace start. 464 Bounds.Downward = false; 465 Bounds.Visited.clear(); 466 for (auto I : inverse_post_order_ext(MBB, Bounds)) { 467 DEBUG(dbgs() << " pred for BB#" << I->getNumber() << ": "); 468 TraceBlockInfo &TBI = BlockInfo[I->getNumber()]; 469 // All the predecessors have been visited, pick the preferred one. 470 TBI.Pred = pickTracePred(I); 471 DEBUG({ 472 if (TBI.Pred) 473 dbgs() << "BB#" << TBI.Pred->getNumber() << '\n'; 474 else 475 dbgs() << "null\n"; 476 }); 477 // The trace leading to I is now known, compute the depth resources. 478 computeDepthResources(I); 479 } 480 481 // Run a downwards post-order search for the trace end. 482 Bounds.Downward = true; 483 Bounds.Visited.clear(); 484 for (auto I : post_order_ext(MBB, Bounds)) { 485 DEBUG(dbgs() << " succ for BB#" << I->getNumber() << ": "); 486 TraceBlockInfo &TBI = BlockInfo[I->getNumber()]; 487 // All the successors have been visited, pick the preferred one. 488 TBI.Succ = pickTraceSucc(I); 489 DEBUG({ 490 if (TBI.Succ) 491 dbgs() << "BB#" << TBI.Succ->getNumber() << '\n'; 492 else 493 dbgs() << "null\n"; 494 }); 495 // The trace leaving I is now known, compute the height resources. 496 computeHeightResources(I); 497 } 498 } 499 500 /// Invalidate traces through BadMBB. 501 void 502 MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) { 503 SmallVector<const MachineBasicBlock*, 16> WorkList; 504 TraceBlockInfo &BadTBI = BlockInfo[BadMBB->getNumber()]; 505 506 // Invalidate height resources of blocks above MBB. 507 if (BadTBI.hasValidHeight()) { 508 BadTBI.invalidateHeight(); 509 WorkList.push_back(BadMBB); 510 do { 511 const MachineBasicBlock *MBB = WorkList.pop_back_val(); 512 DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName() 513 << " height.\n"); 514 // Find any MBB predecessors that have MBB as their preferred successor. 515 // They are the only ones that need to be invalidated. 516 for (MachineBasicBlock::const_pred_iterator 517 I = MBB->pred_begin(), E = MBB->pred_end(); I != E; ++I) { 518 TraceBlockInfo &TBI = BlockInfo[(*I)->getNumber()]; 519 if (!TBI.hasValidHeight()) 520 continue; 521 if (TBI.Succ == MBB) { 522 TBI.invalidateHeight(); 523 WorkList.push_back(*I); 524 continue; 525 } 526 // Verify that TBI.Succ is actually a *I successor. 527 assert((!TBI.Succ || (*I)->isSuccessor(TBI.Succ)) && "CFG changed"); 528 } 529 } while (!WorkList.empty()); 530 } 531 532 // Invalidate depth resources of blocks below MBB. 533 if (BadTBI.hasValidDepth()) { 534 BadTBI.invalidateDepth(); 535 WorkList.push_back(BadMBB); 536 do { 537 const MachineBasicBlock *MBB = WorkList.pop_back_val(); 538 DEBUG(dbgs() << "Invalidate BB#" << MBB->getNumber() << ' ' << getName() 539 << " depth.\n"); 540 // Find any MBB successors that have MBB as their preferred predecessor. 541 // They are the only ones that need to be invalidated. 542 for (MachineBasicBlock::const_succ_iterator 543 I = MBB->succ_begin(), E = MBB->succ_end(); I != E; ++I) { 544 TraceBlockInfo &TBI = BlockInfo[(*I)->getNumber()]; 545 if (!TBI.hasValidDepth()) 546 continue; 547 if (TBI.Pred == MBB) { 548 TBI.invalidateDepth(); 549 WorkList.push_back(*I); 550 continue; 551 } 552 // Verify that TBI.Pred is actually a *I predecessor. 553 assert((!TBI.Pred || (*I)->isPredecessor(TBI.Pred)) && "CFG changed"); 554 } 555 } while (!WorkList.empty()); 556 } 557 558 // Clear any per-instruction data. We only have to do this for BadMBB itself 559 // because the instructions in that block may change. Other blocks may be 560 // invalidated, but their instructions will stay the same, so there is no 561 // need to erase the Cycle entries. They will be overwritten when we 562 // recompute. 563 for (const auto &I : *BadMBB) 564 Cycles.erase(&I); 565 } 566 567 void MachineTraceMetrics::Ensemble::verify() const { 568 #ifndef NDEBUG 569 assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() && 570 "Outdated BlockInfo size"); 571 for (unsigned Num = 0, e = BlockInfo.size(); Num != e; ++Num) { 572 const TraceBlockInfo &TBI = BlockInfo[Num]; 573 if (TBI.hasValidDepth() && TBI.Pred) { 574 const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num); 575 assert(MBB->isPredecessor(TBI.Pred) && "CFG doesn't match trace"); 576 assert(BlockInfo[TBI.Pred->getNumber()].hasValidDepth() && 577 "Trace is broken, depth should have been invalidated."); 578 const MachineLoop *Loop = getLoopFor(MBB); 579 assert(!(Loop && MBB == Loop->getHeader()) && "Trace contains backedge"); 580 } 581 if (TBI.hasValidHeight() && TBI.Succ) { 582 const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num); 583 assert(MBB->isSuccessor(TBI.Succ) && "CFG doesn't match trace"); 584 assert(BlockInfo[TBI.Succ->getNumber()].hasValidHeight() && 585 "Trace is broken, height should have been invalidated."); 586 const MachineLoop *Loop = getLoopFor(MBB); 587 const MachineLoop *SuccLoop = getLoopFor(TBI.Succ); 588 assert(!(Loop && Loop == SuccLoop && TBI.Succ == Loop->getHeader()) && 589 "Trace contains backedge"); 590 } 591 } 592 #endif 593 } 594 595 //===----------------------------------------------------------------------===// 596 // Data Dependencies 597 //===----------------------------------------------------------------------===// 598 // 599 // Compute the depth and height of each instruction based on data dependencies 600 // and instruction latencies. These cycle numbers assume that the CPU can issue 601 // an infinite number of instructions per cycle as long as their dependencies 602 // are ready. 603 604 // A data dependency is represented as a defining MI and operand numbers on the 605 // defining and using MI. 606 namespace { 607 struct DataDep { 608 const MachineInstr *DefMI; 609 unsigned DefOp; 610 unsigned UseOp; 611 612 DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp) 613 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} 614 615 /// Create a DataDep from an SSA form virtual register. 616 DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp) 617 : UseOp(UseOp) { 618 assert(TargetRegisterInfo::isVirtualRegister(VirtReg)); 619 MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg); 620 assert(!DefI.atEnd() && "Register has no defs"); 621 DefMI = DefI->getParent(); 622 DefOp = DefI.getOperandNo(); 623 assert((++DefI).atEnd() && "Register has multiple defs"); 624 } 625 }; 626 } 627 628 // Get the input data dependencies that must be ready before UseMI can issue. 629 // Return true if UseMI has any physreg operands. 630 static bool getDataDeps(const MachineInstr *UseMI, 631 SmallVectorImpl<DataDep> &Deps, 632 const MachineRegisterInfo *MRI) { 633 bool HasPhysRegs = false; 634 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { 635 if (!MO->isReg()) 636 continue; 637 unsigned Reg = MO->getReg(); 638 if (!Reg) 639 continue; 640 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 641 HasPhysRegs = true; 642 continue; 643 } 644 // Collect virtual register reads. 645 if (MO->readsReg()) 646 Deps.push_back(DataDep(MRI, Reg, MO.getOperandNo())); 647 } 648 return HasPhysRegs; 649 } 650 651 // Get the input data dependencies of a PHI instruction, using Pred as the 652 // preferred predecessor. 653 // This will add at most one dependency to Deps. 654 static void getPHIDeps(const MachineInstr *UseMI, 655 SmallVectorImpl<DataDep> &Deps, 656 const MachineBasicBlock *Pred, 657 const MachineRegisterInfo *MRI) { 658 // No predecessor at the beginning of a trace. Ignore dependencies. 659 if (!Pred) 660 return; 661 assert(UseMI->isPHI() && UseMI->getNumOperands() % 2 && "Bad PHI"); 662 for (unsigned i = 1; i != UseMI->getNumOperands(); i += 2) { 663 if (UseMI->getOperand(i + 1).getMBB() == Pred) { 664 unsigned Reg = UseMI->getOperand(i).getReg(); 665 Deps.push_back(DataDep(MRI, Reg, i)); 666 return; 667 } 668 } 669 } 670 671 // Keep track of physreg data dependencies by recording each live register unit. 672 // Associate each regunit with an instruction operand. Depending on the 673 // direction instructions are scanned, it could be the operand that defined the 674 // regunit, or the highest operand to read the regunit. 675 namespace { 676 struct LiveRegUnit { 677 unsigned RegUnit; 678 unsigned Cycle; 679 const MachineInstr *MI; 680 unsigned Op; 681 682 unsigned getSparseSetIndex() const { return RegUnit; } 683 684 LiveRegUnit(unsigned RU) : RegUnit(RU), Cycle(0), MI(nullptr), Op(0) {} 685 }; 686 } 687 688 // Identify physreg dependencies for UseMI, and update the live regunit 689 // tracking set when scanning instructions downwards. 690 static void updatePhysDepsDownwards(const MachineInstr *UseMI, 691 SmallVectorImpl<DataDep> &Deps, 692 SparseSet<LiveRegUnit> &RegUnits, 693 const TargetRegisterInfo *TRI) { 694 SmallVector<unsigned, 8> Kills; 695 SmallVector<unsigned, 8> LiveDefOps; 696 697 for (ConstMIOperands MO(UseMI); MO.isValid(); ++MO) { 698 if (!MO->isReg()) 699 continue; 700 unsigned Reg = MO->getReg(); 701 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) 702 continue; 703 // Track live defs and kills for updating RegUnits. 704 if (MO->isDef()) { 705 if (MO->isDead()) 706 Kills.push_back(Reg); 707 else 708 LiveDefOps.push_back(MO.getOperandNo()); 709 } else if (MO->isKill()) 710 Kills.push_back(Reg); 711 // Identify dependencies. 712 if (!MO->readsReg()) 713 continue; 714 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) { 715 SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units); 716 if (I == RegUnits.end()) 717 continue; 718 Deps.push_back(DataDep(I->MI, I->Op, MO.getOperandNo())); 719 break; 720 } 721 } 722 723 // Update RegUnits to reflect live registers after UseMI. 724 // First kills. 725 for (unsigned i = 0, e = Kills.size(); i != e; ++i) 726 for (MCRegUnitIterator Units(Kills[i], TRI); Units.isValid(); ++Units) 727 RegUnits.erase(*Units); 728 729 // Second, live defs. 730 for (unsigned i = 0, e = LiveDefOps.size(); i != e; ++i) { 731 unsigned DefOp = LiveDefOps[i]; 732 for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI); 733 Units.isValid(); ++Units) { 734 LiveRegUnit &LRU = RegUnits[*Units]; 735 LRU.MI = UseMI; 736 LRU.Op = DefOp; 737 } 738 } 739 } 740 741 /// The length of the critical path through a trace is the maximum of two path 742 /// lengths: 743 /// 744 /// 1. The maximum height+depth over all instructions in the trace center block. 745 /// 746 /// 2. The longest cross-block dependency chain. For small blocks, it is 747 /// possible that the critical path through the trace doesn't include any 748 /// instructions in the block. 749 /// 750 /// This function computes the second number from the live-in list of the 751 /// center block. 752 unsigned MachineTraceMetrics::Ensemble:: 753 computeCrossBlockCriticalPath(const TraceBlockInfo &TBI) { 754 assert(TBI.HasValidInstrDepths && "Missing depth info"); 755 assert(TBI.HasValidInstrHeights && "Missing height info"); 756 unsigned MaxLen = 0; 757 for (unsigned i = 0, e = TBI.LiveIns.size(); i != e; ++i) { 758 const LiveInReg &LIR = TBI.LiveIns[i]; 759 if (!TargetRegisterInfo::isVirtualRegister(LIR.Reg)) 760 continue; 761 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); 762 // Ignore dependencies outside the current trace. 763 const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()]; 764 if (!DefTBI.isUsefulDominator(TBI)) 765 continue; 766 unsigned Len = LIR.Height + Cycles[DefMI].Depth; 767 MaxLen = std::max(MaxLen, Len); 768 } 769 return MaxLen; 770 } 771 772 /// Compute instruction depths for all instructions above or in MBB in its 773 /// trace. This assumes that the trace through MBB has already been computed. 774 void MachineTraceMetrics::Ensemble:: 775 computeInstrDepths(const MachineBasicBlock *MBB) { 776 // The top of the trace may already be computed, and HasValidInstrDepths 777 // implies Head->HasValidInstrDepths, so we only need to start from the first 778 // block in the trace that needs to be recomputed. 779 SmallVector<const MachineBasicBlock*, 8> Stack; 780 do { 781 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; 782 assert(TBI.hasValidDepth() && "Incomplete trace"); 783 if (TBI.HasValidInstrDepths) 784 break; 785 Stack.push_back(MBB); 786 MBB = TBI.Pred; 787 } while (MBB); 788 789 // FIXME: If MBB is non-null at this point, it is the last pre-computed block 790 // in the trace. We should track any live-out physregs that were defined in 791 // the trace. This is quite rare in SSA form, typically created by CSE 792 // hoisting a compare. 793 SparseSet<LiveRegUnit> RegUnits; 794 RegUnits.setUniverse(MTM.TRI->getNumRegUnits()); 795 796 // Go through trace blocks in top-down order, stopping after the center block. 797 SmallVector<DataDep, 8> Deps; 798 while (!Stack.empty()) { 799 MBB = Stack.pop_back_val(); 800 DEBUG(dbgs() << "\nDepths for BB#" << MBB->getNumber() << ":\n"); 801 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; 802 TBI.HasValidInstrDepths = true; 803 TBI.CriticalPath = 0; 804 805 // Print out resource depths here as well. 806 DEBUG({ 807 dbgs() << format("%7u Instructions\n", TBI.InstrDepth); 808 ArrayRef<unsigned> PRDepths = getProcResourceDepths(MBB->getNumber()); 809 for (unsigned K = 0; K != PRDepths.size(); ++K) 810 if (PRDepths[K]) { 811 unsigned Factor = MTM.SchedModel.getResourceFactor(K); 812 dbgs() << format("%6uc @ ", MTM.getCycles(PRDepths[K])) 813 << MTM.SchedModel.getProcResource(K)->Name << " (" 814 << PRDepths[K]/Factor << " ops x" << Factor << ")\n"; 815 } 816 }); 817 818 // Also compute the critical path length through MBB when possible. 819 if (TBI.HasValidInstrHeights) 820 TBI.CriticalPath = computeCrossBlockCriticalPath(TBI); 821 822 for (const auto &UseMI : *MBB) { 823 // Collect all data dependencies. 824 Deps.clear(); 825 if (UseMI.isPHI()) 826 getPHIDeps(&UseMI, Deps, TBI.Pred, MTM.MRI); 827 else if (getDataDeps(&UseMI, Deps, MTM.MRI)) 828 updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI); 829 830 // Filter and process dependencies, computing the earliest issue cycle. 831 unsigned Cycle = 0; 832 for (unsigned i = 0, e = Deps.size(); i != e; ++i) { 833 const DataDep &Dep = Deps[i]; 834 const TraceBlockInfo&DepTBI = 835 BlockInfo[Dep.DefMI->getParent()->getNumber()]; 836 // Ignore dependencies from outside the current trace. 837 if (!DepTBI.isUsefulDominator(TBI)) 838 continue; 839 assert(DepTBI.HasValidInstrDepths && "Inconsistent dependency"); 840 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth; 841 // Add latency if DefMI is a real instruction. Transients get latency 0. 842 if (!Dep.DefMI->isTransient()) 843 DepCycle += MTM.SchedModel 844 .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp); 845 Cycle = std::max(Cycle, DepCycle); 846 } 847 // Remember the instruction depth. 848 InstrCycles &MICycles = Cycles[&UseMI]; 849 MICycles.Depth = Cycle; 850 851 if (!TBI.HasValidInstrHeights) { 852 DEBUG(dbgs() << Cycle << '\t' << UseMI); 853 continue; 854 } 855 // Update critical path length. 856 TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height); 857 DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI); 858 } 859 } 860 } 861 862 // Identify physreg dependencies for MI when scanning instructions upwards. 863 // Return the issue height of MI after considering any live regunits. 864 // Height is the issue height computed from virtual register dependencies alone. 865 static unsigned updatePhysDepsUpwards(const MachineInstr *MI, unsigned Height, 866 SparseSet<LiveRegUnit> &RegUnits, 867 const TargetSchedModel &SchedModel, 868 const TargetInstrInfo *TII, 869 const TargetRegisterInfo *TRI) { 870 SmallVector<unsigned, 8> ReadOps; 871 for (ConstMIOperands MO(MI); MO.isValid(); ++MO) { 872 if (!MO->isReg()) 873 continue; 874 unsigned Reg = MO->getReg(); 875 if (!TargetRegisterInfo::isPhysicalRegister(Reg)) 876 continue; 877 if (MO->readsReg()) 878 ReadOps.push_back(MO.getOperandNo()); 879 if (!MO->isDef()) 880 continue; 881 // This is a def of Reg. Remove corresponding entries from RegUnits, and 882 // update MI Height to consider the physreg dependencies. 883 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) { 884 SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units); 885 if (I == RegUnits.end()) 886 continue; 887 unsigned DepHeight = I->Cycle; 888 if (!MI->isTransient()) { 889 // We may not know the UseMI of this dependency, if it came from the 890 // live-in list. SchedModel can handle a NULL UseMI. 891 DepHeight += SchedModel 892 .computeOperandLatency(MI, MO.getOperandNo(), I->MI, I->Op); 893 } 894 Height = std::max(Height, DepHeight); 895 // This regunit is dead above MI. 896 RegUnits.erase(I); 897 } 898 } 899 900 // Now we know the height of MI. Update any regunits read. 901 for (unsigned i = 0, e = ReadOps.size(); i != e; ++i) { 902 unsigned Reg = MI->getOperand(ReadOps[i]).getReg(); 903 for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) { 904 LiveRegUnit &LRU = RegUnits[*Units]; 905 // Set the height to the highest reader of the unit. 906 if (LRU.Cycle <= Height && LRU.MI != MI) { 907 LRU.Cycle = Height; 908 LRU.MI = MI; 909 LRU.Op = ReadOps[i]; 910 } 911 } 912 } 913 914 return Height; 915 } 916 917 918 typedef DenseMap<const MachineInstr *, unsigned> MIHeightMap; 919 920 // Push the height of DefMI upwards if required to match UseMI. 921 // Return true if this is the first time DefMI was seen. 922 static bool pushDepHeight(const DataDep &Dep, 923 const MachineInstr *UseMI, unsigned UseHeight, 924 MIHeightMap &Heights, 925 const TargetSchedModel &SchedModel, 926 const TargetInstrInfo *TII) { 927 // Adjust height by Dep.DefMI latency. 928 if (!Dep.DefMI->isTransient()) 929 UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, 930 UseMI, Dep.UseOp); 931 932 // Update Heights[DefMI] to be the maximum height seen. 933 MIHeightMap::iterator I; 934 bool New; 935 std::tie(I, New) = Heights.insert(std::make_pair(Dep.DefMI, UseHeight)); 936 if (New) 937 return true; 938 939 // DefMI has been pushed before. Give it the max height. 940 if (I->second < UseHeight) 941 I->second = UseHeight; 942 return false; 943 } 944 945 /// Assuming that the virtual register defined by DefMI:DefOp was used by 946 /// Trace.back(), add it to the live-in lists of all the blocks in Trace. Stop 947 /// when reaching the block that contains DefMI. 948 void MachineTraceMetrics::Ensemble:: 949 addLiveIns(const MachineInstr *DefMI, unsigned DefOp, 950 ArrayRef<const MachineBasicBlock*> Trace) { 951 assert(!Trace.empty() && "Trace should contain at least one block"); 952 unsigned Reg = DefMI->getOperand(DefOp).getReg(); 953 assert(TargetRegisterInfo::isVirtualRegister(Reg)); 954 const MachineBasicBlock *DefMBB = DefMI->getParent(); 955 956 // Reg is live-in to all blocks in Trace that follow DefMBB. 957 for (unsigned i = Trace.size(); i; --i) { 958 const MachineBasicBlock *MBB = Trace[i-1]; 959 if (MBB == DefMBB) 960 return; 961 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; 962 // Just add the register. The height will be updated later. 963 TBI.LiveIns.push_back(Reg); 964 } 965 } 966 967 /// Compute instruction heights in the trace through MBB. This updates MBB and 968 /// the blocks below it in the trace. It is assumed that the trace has already 969 /// been computed. 970 void MachineTraceMetrics::Ensemble:: 971 computeInstrHeights(const MachineBasicBlock *MBB) { 972 // The bottom of the trace may already be computed. 973 // Find the blocks that need updating. 974 SmallVector<const MachineBasicBlock*, 8> Stack; 975 do { 976 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; 977 assert(TBI.hasValidHeight() && "Incomplete trace"); 978 if (TBI.HasValidInstrHeights) 979 break; 980 Stack.push_back(MBB); 981 TBI.LiveIns.clear(); 982 MBB = TBI.Succ; 983 } while (MBB); 984 985 // As we move upwards in the trace, keep track of instructions that are 986 // required by deeper trace instructions. Map MI -> height required so far. 987 MIHeightMap Heights; 988 989 // For physregs, the def isn't known when we see the use. 990 // Instead, keep track of the highest use of each regunit. 991 SparseSet<LiveRegUnit> RegUnits; 992 RegUnits.setUniverse(MTM.TRI->getNumRegUnits()); 993 994 // If the bottom of the trace was already precomputed, initialize heights 995 // from its live-in list. 996 // MBB is the highest precomputed block in the trace. 997 if (MBB) { 998 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; 999 for (unsigned i = 0, e = TBI.LiveIns.size(); i != e; ++i) { 1000 LiveInReg LI = TBI.LiveIns[i]; 1001 if (TargetRegisterInfo::isVirtualRegister(LI.Reg)) { 1002 // For virtual registers, the def latency is included. 1003 unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)]; 1004 if (Height < LI.Height) 1005 Height = LI.Height; 1006 } else { 1007 // For register units, the def latency is not included because we don't 1008 // know the def yet. 1009 RegUnits[LI.Reg].Cycle = LI.Height; 1010 } 1011 } 1012 } 1013 1014 // Go through the trace blocks in bottom-up order. 1015 SmallVector<DataDep, 8> Deps; 1016 for (;!Stack.empty(); Stack.pop_back()) { 1017 MBB = Stack.back(); 1018 DEBUG(dbgs() << "Heights for BB#" << MBB->getNumber() << ":\n"); 1019 TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()]; 1020 TBI.HasValidInstrHeights = true; 1021 TBI.CriticalPath = 0; 1022 1023 DEBUG({ 1024 dbgs() << format("%7u Instructions\n", TBI.InstrHeight); 1025 ArrayRef<unsigned> PRHeights = getProcResourceHeights(MBB->getNumber()); 1026 for (unsigned K = 0; K != PRHeights.size(); ++K) 1027 if (PRHeights[K]) { 1028 unsigned Factor = MTM.SchedModel.getResourceFactor(K); 1029 dbgs() << format("%6uc @ ", MTM.getCycles(PRHeights[K])) 1030 << MTM.SchedModel.getProcResource(K)->Name << " (" 1031 << PRHeights[K]/Factor << " ops x" << Factor << ")\n"; 1032 } 1033 }); 1034 1035 // Get dependencies from PHIs in the trace successor. 1036 const MachineBasicBlock *Succ = TBI.Succ; 1037 // If MBB is the last block in the trace, and it has a back-edge to the 1038 // loop header, get loop-carried dependencies from PHIs in the header. For 1039 // that purpose, pretend that all the loop header PHIs have height 0. 1040 if (!Succ) 1041 if (const MachineLoop *Loop = getLoopFor(MBB)) 1042 if (MBB->isSuccessor(Loop->getHeader())) 1043 Succ = Loop->getHeader(); 1044 1045 if (Succ) { 1046 for (const auto &PHI : *Succ) { 1047 if (!PHI.isPHI()) 1048 break; 1049 Deps.clear(); 1050 getPHIDeps(&PHI, Deps, MBB, MTM.MRI); 1051 if (!Deps.empty()) { 1052 // Loop header PHI heights are all 0. 1053 unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0; 1054 DEBUG(dbgs() << "pred\t" << Height << '\t' << PHI); 1055 if (pushDepHeight(Deps.front(), &PHI, Height, 1056 Heights, MTM.SchedModel, MTM.TII)) 1057 addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack); 1058 } 1059 } 1060 } 1061 1062 // Go through the block backwards. 1063 for (MachineBasicBlock::const_iterator BI = MBB->end(), BB = MBB->begin(); 1064 BI != BB;) { 1065 const MachineInstr *MI = --BI; 1066 1067 // Find the MI height as determined by virtual register uses in the 1068 // trace below. 1069 unsigned Cycle = 0; 1070 MIHeightMap::iterator HeightI = Heights.find(MI); 1071 if (HeightI != Heights.end()) { 1072 Cycle = HeightI->second; 1073 // We won't be seeing any more MI uses. 1074 Heights.erase(HeightI); 1075 } 1076 1077 // Don't process PHI deps. They depend on the specific predecessor, and 1078 // we'll get them when visiting the predecessor. 1079 Deps.clear(); 1080 bool HasPhysRegs = !MI->isPHI() && getDataDeps(MI, Deps, MTM.MRI); 1081 1082 // There may also be regunit dependencies to include in the height. 1083 if (HasPhysRegs) 1084 Cycle = updatePhysDepsUpwards(MI, Cycle, RegUnits, 1085 MTM.SchedModel, MTM.TII, MTM.TRI); 1086 1087 // Update the required height of any virtual registers read by MI. 1088 for (unsigned i = 0, e = Deps.size(); i != e; ++i) 1089 if (pushDepHeight(Deps[i], MI, Cycle, Heights, MTM.SchedModel, MTM.TII)) 1090 addLiveIns(Deps[i].DefMI, Deps[i].DefOp, Stack); 1091 1092 InstrCycles &MICycles = Cycles[MI]; 1093 MICycles.Height = Cycle; 1094 if (!TBI.HasValidInstrDepths) { 1095 DEBUG(dbgs() << Cycle << '\t' << *MI); 1096 continue; 1097 } 1098 // Update critical path length. 1099 TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Depth); 1100 DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << *MI); 1101 } 1102 1103 // Update virtual live-in heights. They were added by addLiveIns() with a 0 1104 // height because the final height isn't known until now. 1105 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " Live-ins:"); 1106 for (unsigned i = 0, e = TBI.LiveIns.size(); i != e; ++i) { 1107 LiveInReg &LIR = TBI.LiveIns[i]; 1108 const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg); 1109 LIR.Height = Heights.lookup(DefMI); 1110 DEBUG(dbgs() << ' ' << PrintReg(LIR.Reg) << '@' << LIR.Height); 1111 } 1112 1113 // Transfer the live regunits to the live-in list. 1114 for (SparseSet<LiveRegUnit>::const_iterator 1115 RI = RegUnits.begin(), RE = RegUnits.end(); RI != RE; ++RI) { 1116 TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle)); 1117 DEBUG(dbgs() << ' ' << PrintRegUnit(RI->RegUnit, MTM.TRI) 1118 << '@' << RI->Cycle); 1119 } 1120 DEBUG(dbgs() << '\n'); 1121 1122 if (!TBI.HasValidInstrDepths) 1123 continue; 1124 // Add live-ins to the critical path length. 1125 TBI.CriticalPath = std::max(TBI.CriticalPath, 1126 computeCrossBlockCriticalPath(TBI)); 1127 DEBUG(dbgs() << "Critical path: " << TBI.CriticalPath << '\n'); 1128 } 1129 } 1130 1131 MachineTraceMetrics::Trace 1132 MachineTraceMetrics::Ensemble::getTrace(const MachineBasicBlock *MBB) { 1133 // FIXME: Check cache tags, recompute as needed. 1134 computeTrace(MBB); 1135 computeInstrDepths(MBB); 1136 computeInstrHeights(MBB); 1137 return Trace(*this, BlockInfo[MBB->getNumber()]); 1138 } 1139 1140 unsigned 1141 MachineTraceMetrics::Trace::getInstrSlack(const MachineInstr *MI) const { 1142 assert(MI && "Not an instruction."); 1143 assert(getBlockNum() == unsigned(MI->getParent()->getNumber()) && 1144 "MI must be in the trace center block"); 1145 InstrCycles Cyc = getInstrCycles(MI); 1146 return getCriticalPath() - (Cyc.Depth + Cyc.Height); 1147 } 1148 1149 unsigned 1150 MachineTraceMetrics::Trace::getPHIDepth(const MachineInstr *PHI) const { 1151 const MachineBasicBlock *MBB = TE.MTM.MF->getBlockNumbered(getBlockNum()); 1152 SmallVector<DataDep, 1> Deps; 1153 getPHIDeps(PHI, Deps, MBB, TE.MTM.MRI); 1154 assert(Deps.size() == 1 && "PHI doesn't have MBB as a predecessor"); 1155 DataDep &Dep = Deps.front(); 1156 unsigned DepCycle = getInstrCycles(Dep.DefMI).Depth; 1157 // Add latency if DefMI is a real instruction. Transients get latency 0. 1158 if (!Dep.DefMI->isTransient()) 1159 DepCycle += TE.MTM.SchedModel 1160 .computeOperandLatency(Dep.DefMI, Dep.DefOp, PHI, Dep.UseOp); 1161 return DepCycle; 1162 } 1163 1164 /// When bottom is set include instructions in current block in estimate. 1165 unsigned MachineTraceMetrics::Trace::getResourceDepth(bool Bottom) const { 1166 // Find the limiting processor resource. 1167 // Numbers have been pre-scaled to be comparable. 1168 unsigned PRMax = 0; 1169 ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum()); 1170 if (Bottom) { 1171 ArrayRef<unsigned> PRCycles = TE.MTM.getProcResourceCycles(getBlockNum()); 1172 for (unsigned K = 0; K != PRDepths.size(); ++K) 1173 PRMax = std::max(PRMax, PRDepths[K] + PRCycles[K]); 1174 } else { 1175 for (unsigned K = 0; K != PRDepths.size(); ++K) 1176 PRMax = std::max(PRMax, PRDepths[K]); 1177 } 1178 // Convert to cycle count. 1179 PRMax = TE.MTM.getCycles(PRMax); 1180 1181 /// All instructions before current block 1182 unsigned Instrs = TBI.InstrDepth; 1183 // plus instructions in current block 1184 if (Bottom) 1185 Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount; 1186 if (unsigned IW = TE.MTM.SchedModel.getIssueWidth()) 1187 Instrs /= IW; 1188 // Assume issue width 1 without a schedule model. 1189 return std::max(Instrs, PRMax); 1190 } 1191 1192 unsigned MachineTraceMetrics::Trace::getResourceLength( 1193 ArrayRef<const MachineBasicBlock *> Extrablocks, 1194 ArrayRef<const MCSchedClassDesc *> ExtraInstrs, 1195 ArrayRef<const MCSchedClassDesc *> RemoveInstrs) const { 1196 // Add up resources above and below the center block. 1197 ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum()); 1198 ArrayRef<unsigned> PRHeights = TE.getProcResourceHeights(getBlockNum()); 1199 unsigned PRMax = 0; 1200 1201 // Capture computing cycles from extra instructions 1202 auto extraCycles = [this](ArrayRef<const MCSchedClassDesc *> Instrs, 1203 unsigned ResourceIdx) 1204 ->unsigned { 1205 unsigned Cycles = 0; 1206 for (unsigned I = 0; I != Instrs.size(); ++I) { 1207 const MCSchedClassDesc *SC = Instrs[I]; 1208 if (!SC->isValid()) 1209 continue; 1210 for (TargetSchedModel::ProcResIter 1211 PI = TE.MTM.SchedModel.getWriteProcResBegin(SC), 1212 PE = TE.MTM.SchedModel.getWriteProcResEnd(SC); 1213 PI != PE; ++PI) { 1214 if (PI->ProcResourceIdx != ResourceIdx) 1215 continue; 1216 Cycles += 1217 (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(ResourceIdx)); 1218 } 1219 } 1220 return Cycles; 1221 }; 1222 1223 for (unsigned K = 0; K != PRDepths.size(); ++K) { 1224 unsigned PRCycles = PRDepths[K] + PRHeights[K]; 1225 for (unsigned I = 0; I != Extrablocks.size(); ++I) 1226 PRCycles += TE.MTM.getProcResourceCycles(Extrablocks[I]->getNumber())[K]; 1227 PRCycles += extraCycles(ExtraInstrs, K); 1228 PRCycles -= extraCycles(RemoveInstrs, K); 1229 PRMax = std::max(PRMax, PRCycles); 1230 } 1231 // Convert to cycle count. 1232 PRMax = TE.MTM.getCycles(PRMax); 1233 1234 // Instrs: #instructions in current trace outside current block. 1235 unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight; 1236 // Add instruction count from the extra blocks. 1237 for (unsigned i = 0, e = Extrablocks.size(); i != e; ++i) 1238 Instrs += TE.MTM.getResources(Extrablocks[i])->InstrCount; 1239 Instrs += ExtraInstrs.size(); 1240 Instrs -= RemoveInstrs.size(); 1241 if (unsigned IW = TE.MTM.SchedModel.getIssueWidth()) 1242 Instrs /= IW; 1243 // Assume issue width 1 without a schedule model. 1244 return std::max(Instrs, PRMax); 1245 } 1246 1247 bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr *DefMI, 1248 const MachineInstr *UseMI) const { 1249 if (DefMI->getParent() == UseMI->getParent()) 1250 return true; 1251 1252 const TraceBlockInfo &DepTBI = TE.BlockInfo[DefMI->getParent()->getNumber()]; 1253 const TraceBlockInfo &TBI = TE.BlockInfo[UseMI->getParent()->getNumber()]; 1254 1255 return DepTBI.isUsefulDominator(TBI); 1256 } 1257 1258 void MachineTraceMetrics::Ensemble::print(raw_ostream &OS) const { 1259 OS << getName() << " ensemble:\n"; 1260 for (unsigned i = 0, e = BlockInfo.size(); i != e; ++i) { 1261 OS << " BB#" << i << '\t'; 1262 BlockInfo[i].print(OS); 1263 OS << '\n'; 1264 } 1265 } 1266 1267 void MachineTraceMetrics::TraceBlockInfo::print(raw_ostream &OS) const { 1268 if (hasValidDepth()) { 1269 OS << "depth=" << InstrDepth; 1270 if (Pred) 1271 OS << " pred=BB#" << Pred->getNumber(); 1272 else 1273 OS << " pred=null"; 1274 OS << " head=BB#" << Head; 1275 if (HasValidInstrDepths) 1276 OS << " +instrs"; 1277 } else 1278 OS << "depth invalid"; 1279 OS << ", "; 1280 if (hasValidHeight()) { 1281 OS << "height=" << InstrHeight; 1282 if (Succ) 1283 OS << " succ=BB#" << Succ->getNumber(); 1284 else 1285 OS << " succ=null"; 1286 OS << " tail=BB#" << Tail; 1287 if (HasValidInstrHeights) 1288 OS << " +instrs"; 1289 } else 1290 OS << "height invalid"; 1291 if (HasValidInstrDepths && HasValidInstrHeights) 1292 OS << ", crit=" << CriticalPath; 1293 } 1294 1295 void MachineTraceMetrics::Trace::print(raw_ostream &OS) const { 1296 unsigned MBBNum = &TBI - &TE.BlockInfo[0]; 1297 1298 OS << TE.getName() << " trace BB#" << TBI.Head << " --> BB#" << MBBNum 1299 << " --> BB#" << TBI.Tail << ':'; 1300 if (TBI.hasValidHeight() && TBI.hasValidDepth()) 1301 OS << ' ' << getInstrCount() << " instrs."; 1302 if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights) 1303 OS << ' ' << TBI.CriticalPath << " cycles."; 1304 1305 const MachineTraceMetrics::TraceBlockInfo *Block = &TBI; 1306 OS << "\nBB#" << MBBNum; 1307 while (Block->hasValidDepth() && Block->Pred) { 1308 unsigned Num = Block->Pred->getNumber(); 1309 OS << " <- BB#" << Num; 1310 Block = &TE.BlockInfo[Num]; 1311 } 1312 1313 Block = &TBI; 1314 OS << "\n "; 1315 while (Block->hasValidHeight() && Block->Succ) { 1316 unsigned Num = Block->Succ->getNumber(); 1317 OS << " -> BB#" << Num; 1318 Block = &TE.BlockInfo[Num]; 1319 } 1320 OS << '\n'; 1321 } 1322