| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 122 std::string FuncName(unsigned AccessSize, bool IsWrite) {
123 return std::string("__asan_report_") + (IsWrite ? "store" : "load") +
219 bool IsWrite,
223 bool IsWrite,
230 void InstrumentMemOperand(X86Operand &Op, unsigned AccessSize, bool IsWrite,
289 X86Operand &Op, unsigned AccessSize, bool IsWrite,
296 InstrumentMemOperandSmall(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
298 InstrumentMemOperandLarge(Op, AccessSize, IsWrite, RegCtx, Ctx, Out);
322 InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, RegCtx, Ctx,
332 InstrumentMemOperand(*Op, AccessSize, false /* IsWrite */, RegCtx, Ctx
[all...] |
| /external/compiler-rt/lib/tsan/tests/unit/ |
| tsan_shadow_test.cc | 28 EXPECT_EQ(s.IsWrite(), true);
|
| /external/llvm/lib/Transforms/Instrumentation/ |
| AddressSanitizer.cpp | 406 /// and set IsWrite/Alignment. Otherwise return nullptr.
407 Value *isInterestingMemoryAccess(Instruction *I, bool *IsWrite,
414 Value *Addr, uint32_t TypeSize, bool IsWrite,
417 uint32_t TypeSize, bool IsWrite,
423 bool IsWrite, size_t AccessSizeIndex,
[all...] |
| ThreadSanitizer.cpp | 404 bool IsWrite = isa<StoreInst>(*I);
405 Value *Addr = IsWrite
411 if (IsWrite && isVtableAccess(I)) {
429 if (!IsWrite && isVtableAccess(I)) {
435 const unsigned Alignment = IsWrite
442 OnAccessFunc = IsWrite ? TsanWrite[Idx] : TsanRead[Idx];
444 OnAccessFunc = IsWrite ? TsanUnalignedWrite[Idx] : TsanUnalignedRead[Idx];
446 if (IsWrite) NumInstrumentedWrites++;
|
| /external/llvm/lib/Analysis/ |
| LoopAccessAnalysis.cpp | 315 bool IsWrite = Accesses.count(MemAccessInfo(Ptr, true));
316 MemAccessInfo Access(Ptr, IsWrite);
318 if (IsWrite)
341 RtCheck.insert(SE, TheLoop, Ptr, IsWrite, DepId, ASId, StridesMap);
438 bool IsWrite = AC.getInt();
442 bool IsReadOnlyPtr = ReadOnlyPtr.count(Ptr) && !IsWrite;
447 assert(((IsReadOnlyPtr && UseDeferred) || IsWrite ||
451 MemAccessInfo Access(Ptr, IsWrite);
458 // "a[b[i]] +="). Hence, we need the second check for "!IsWrite".
468 if ((IsWrite || IsReadOnlyPtr) && SetHasWrite)
[all...] |
| /external/compiler-rt/lib/tsan/rtl/ |
| tsan_rtl.h | 199 DCHECK_EQ(kAccessIsWrite, IsWrite());
249 bool ALWAYS_INLINE IsWrite() const { return !IsRead(); }
278 DCHECK_EQ(v, (!IsWrite() && !kIsWrite) || (IsAtomic() && kIsAtomic));
286 (IsAtomic() == kIsAtomic && !IsWrite() <= !kIsWrite));
294 (IsAtomic() == kIsAtomic && !IsWrite() >= !kIsWrite));
|
| tsan_rtl_report.cc | 166 mop->write = s.IsWrite();
|
| /external/pdfium/core/src/fxcodec/lcms2/lcms2-2.6/src/ |
| cmsio0.c | 1020 NewIcc -> IsWrite = TRUE;
1048 NewIcc -> IsWrite = TRUE;
1082 NewIcc -> IsWrite = TRUE;
[all...] |
| lcms2_internal.h | 738 cmsBool IsWrite;
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
